Blog Review: Feb. 14

Parasitic extraction for 3nm; layout-versus-schematic (LVS) checking; data center cooling failures; semiconductor data management challenges; five-phase electric motors; $1 trillion chip industry by 2030.


Siemens’ Dilan Heredia and Karen Chow explain why fast, accurate parasitic extraction (PEX) is essential to design success, especially for the 3 nm node and GAAFETs.

Synopsys’ Srinivas Velivala debunks the myth that layout-versus-schematic (LVS) checking is a static step in the chip development process, and details its evolving role in modern SoCs.

Cadence’s Mark Seymour digs into a data center cooling failure and explains how computational fluid dynamics (CFD) simulation software can help find potential thermal issues before they happen.

Keysight’s Emily Yan outlines the challenges of semiconductor data management, including large binary files, heterogeneous design flows, collaborating across distributed teams, and IP protection and traceability.

Arm’s Rui Chang shows how a storage performance development kit (SPDK) can optimize modern storage hardware, such as non-volatile memory (NVM) devices, solid-state drives (SSD), and networked storage devices.

Ansys’ Susan Coleman discusses the benefits of five-phase versus three-phase electric motors, including 15% more torque, 17% more power, 6% higher speed range, and 40% less current load per switch.

SEMI’s Ajit Manocha discusses why he remains bullish on the chip industry reaching $1 trillion around the end of this decade, and the challenges to getting there.

Plus, check out the blogs featured in the latest Test, Measurement & Analytics newsletter:

Onto Innovation’s Nick Keller shows how to use an optical critical dimension (OCD) to measure trench structures in SiC power devices.

NI’s Alejandro Escobar Calderon and John Ye unravel the complexities of wireless standard deployments and point to the benefits of modular test instruments in dealing with changing requirements.

Advantest’s Michael Chang explains how the True Zero Trust containment system enables AI on the test floor to combat IC manufacturing security challenges.

Synopsys’ Sri Ganta examines how shifting left can improve the effectiveness of AI in optimizing pattern generation, solving semiconductor test costs and design schedules.

Bruker’s Xia Stammer zeroes in on the role of Fourier-transform infrared spectroscopy (FTIR) in exploring the surface features of other planets.

Teradyne’s Eli Roth and NI’s Eran Rousseau detail the limitations of a siloed approach to data analytics and discuss how company partnerships can improve IC quality and yield.

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