Dynamic Characterization Of A Power Semiconductor Bare Chip


Power semiconductor devices are used in a variety of forms, such as being packaged in Surface Mount Devices (SMDs) or power modules, and they find broad applications. Power semiconductor bare chips are loaded into these packages. It is desirable to characterize the bare chip before placing it in a package or a power module to expedite development. However, the small size, fragile structure, and... » read more

Blog Review: Mar. 26


Siemens' Bianca Ward argues that sustainability must be considered starting from the design phase to reduce the energy consumption of ICs as well as the production processes used to manufacture them. Synopsys' Adrien Tozzoli looks at how physical optics simulation can be improved by using beam synthesis propagation, a method that decomposes the optical field into a collection of beamlets to ... » read more

Chip Industry Week In Review


Semiconductor industry energy consumption grew 125% between 2015 and 2023, while direct greenhouse gas emissions rose 23% in the same period, according to the Europe think tank Interface, which analyzed corporate social responsibility reports from 28 global chip manufacturers. CSIS' new report "Understanding U.S. Allies’ Current Legal Authority to Implement AI and Semiconductor Export Cont... » read more

Blog Review: Mar. 19


Cadence's Neelabh Singh explains the defined port operations of USB4 that are used to bring transmitters burst and receivers of a design under test into compliance mode and to execute tests like bit error tests, error rate tests, clock switch tests, TxFFE equalization tests, and electrical idle tests. Siemens EDA's Stephen V. Chavez examines the use of blind and buried vias in high-density i... » read more

Integrating Data From Design, Manufacturing, And The Field


Chip design is starting to include more options to ensure chips behave reliably in the field, boosting the ability to tweak both hardware and software as chips age. The basic problem is that as dimensions become smaller, and as more features are added into devices — especially with heterogeneous assemblies of chiplets running some type of AI — the potential for thermally induced structur... » read more

Blog Review: Mar. 12


Cadence's P. Saisrinivas explains the relationship between drive strength and cell delay and why it is key to choose the appropriate drive strength to meet timing constraints while minimizing power and area. Siemens' Daniel Berger and Dirk Hartmann tackle the readout problem of accurately measuring the state of a quantum system after it has undergone a quantum computation, which becomes incr... » read more

Chip Industry Week In Review


The Malaysian government signed a deal with Arm to kickstart a chip design ecosystem. Until now, Malaysia has focused on packaging and test. Adding chip design represents a major change in focus. The country will pay SoftBank $250 million over 10 years for Arm’s chip design IP and train 10,000 engineers. Global chip sales reached $56 billion in January, up nearly 18% from the same period i... » read more

Chip Industry Week In Review


Intel said its new fab in Licking County, Ohio will be delayed due to financial struggles and a need to align chip production with market demand, reported the Columbus Dispatch. Construction is now estimated to be completed in 2030, with operations to start in 2030 or 2031. The company said it already has invested $3.7 billion locally. Apple plans to invest more than $500 billion in the U.S... » read more

Lines Blurring Between Supercomputing And HPC


Supercomputers and high-performance computers are becoming increasingly difficult to differentiate due to the proliferation of AI, which is driving huge performance increases in commercial and scientific applications and raising similar challenges for both. While the goals of supercomputing and high-performance computing (HPC) have always been similar — blazing fast processing — the mark... » read more

Key Challenges In Scaling AI Clusters


AI is evolving at an unprecedented pace, driving an urgent need for more powerful and efficient data centers. In response, nations and companies are ramping up investments into AI infrastructure. According to Forbes, AI spending from the Big Tech sector will exceed $250 billion in 2025, with the bulk going towards infrastructure. By 2029, global investments in AI infrastructure, including dat... » read more

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