Chiplet IP Standards Are Just The Beginning


Experts at the Table: Semiconductor Engineering sat down to talk about chiplet standards, interoperability, and the need for highly customized AI chiplets, with Frank Schirrmeister, vice president solutions and business development at Arteris; Mayank Bhatnagar, product marketing director in the Silicon Solutions Group at Cadence; Paul Karazuba, vice president of marketing at Expedera; Stephen S... » read more

Blog Review: Mar. 6


Synopsys' Gandharv Bhatara notes that successfully deploying high-NA EUV will rely on computational lithography to provide accurate modeling of aberrations, compact 3D mask modeling, and expand inverse lithography to full-chip processing. Cadence's John Park argues for using a systematic and automated system for co-design and co-analysis of multi-die packages to reduce the margin for human e... » read more

Optimizing EDA Cloud Hardware And Workloads


Optimizing EDA hardware for the cloud can shorten the time required for large and complex simulations, but not all workloads will benefit equally, and much more can be done to improve those that can. Tens of thousands of GPUs and specialized accelerators, all working in parallel, add significant and elastic compute horsepower for complex designs. That allows design teams to explore various a... » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will be jointly owned by Tata and Taiwan's Powerchip. The second fab will be a joint investment between CG Power, Japan's Renesas Electronics, and Thailand's Stars Microelectronics. Tata will run t... » read more

Commercial Chiplet Ecosystem May Be A Decade Away


Experts at the Table: Semiconductor Engineering sat down to talk about the challenges of establishing a commercial chiplet ecosystem with Frank Schirrmeister, vice president solutions and business development at Arteris; Mayank Bhatnagar, product marketing director in the Silicon Solutions Group at Cadence; Paul Karazuba, vice president of marketing at Expedera; Stephen Slater, EDA product mana... » read more

What’s Next For Power Electronics? Beyond Silicon


For more than half a century, silicon has been the bedrock of power electronics. Yet as silicon meets its physical limitations in higher-power, higher-temperature applications, the industry’s relentless pursuit of more efficient power systems has ushered in the wide bandgap (WBG) semiconductors era. The global WBG semiconductors market reached $1.6 billion in 2022, with an estimated CAGR of ... » read more

Blog Review: Feb. 28


Synopsys' Emilie Viasnoff suggests that employing virtual sensors when developing an autonomous driving system helps aid in sensor design and minimizes the hazards associated with extensive real-world driving. Cadence's Anthony Ducimo introduces a methodology for embedded BootROM verification that relies only on standard RTL verification toolchains to reveal bugs, identify unused sections of... » read more

Understanding The Differences Between Oscilloscopes And Digitizers For Wideband Signal Acquisitions


Most of us remember the first time we used an oscilloscope. With one look at the large display, we could tell what was happening to our waveforms. From the earliest days, oscilloscopes have been a primary tool for quick visualization of time-variant waveforms, and over the years, they’ve become a core instrument on the bench. Wideband digitizers are related to modern oscilloscopes since both ... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Intel officially launched Intel Foundry this week, claiming it's the "world's first systems foundry for the AI era." The foundry also showed off a more detailed technology roadmap down to expanded 14A process technology. Intel CEO Pat Gelsinger noted the foundry will be separate from the chipmaker, utilize third-party chiplets and IP, and leverage... » read more

Blog Review: Feb. 21


Siemens' John McMillan digs into physical verification maturity for high-density advanced packaging (HDAP) designs and major differences in the LVS verification flow compared to the well-established process for SoCs. Synopsys' Varun Shah identifies why a cloud adoption framework is key to getting the most out of deploying EDA tools in the cloud, including by ensuring that different types of ... » read more

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