Blog Review: April 1

Siemens EDA’s Harry Foster considers why first-silicon success is continuing to decline even though tools are capable of handling much larger design sizes and identifies how increasingly complex interactions between components cause traditional verification assumptions to break down.

Synopsys’ Eldo N Baby explores dynamic voltage drop analysis, including how to bring in switching scenario information earlier in the design flow by utilizing RTL VCDs and challenges in selecting the right VCD window for analysis.

Cadence’s Mick Posner introduces a framework designed to accelerate chiplet development and ensure cross-chiplet interoperability by standardizing common interfaces and providing a pre-verified and integrated set of subsystems.

Keysight’s Seungtaek Chang explains why the physical layer has become a critical design decision as vehicle architectures continue to consolidate computing power and push data rates higher.

Arm’s Iago Calvo Lista looks at how GPU-driven rendering techniques are no longer exclusive to desktop and console systems and can be brought to mobile devices with tile-based rendering GPUs.

Ansys’ Xiao Hu and Shihu Ma combine CFD-anchored reduced-order modeling with flow-aware thermal coupling for faster, scalable EV battery thermal simulation.

SEMI’s Rafael Tudela suggests that achieving energy-efficient computing AI will require pre-competitive, industry-wide collaboration on foundational capabilities such as hybrid bonding process flows and advanced thermal strategies.

Plus, check out the blogs featured in the latest Systems & Design newsletter:

Technology editor Brian Bailey contends that any software which claims to be independent from hardware is inefficient and bloated.

Baya Systems’ Saurabh Gayen explains why inference is reshaping data center architectures, introducing new and less forgiving network requirements.

Synopsys’ Madhumita Sanyal digs into complex parasitic interactions caused by vertical signal paths.

Movellus’ Hari Mani, and Siemens’ Henrique Mendes and Robert Wilcox, highlight the importance of observing changes in the physical power delivery network and correlating them with functional behavior.

Arteris’ John Elliott finds that security can no longer rely on assumptions or isolated checks as hardware complexity increases.

Cadence’s Hamid Shojaei shows why verifying individual blocks before subsystem integration allows engineers to focus on complex system-level interactions.

Siemens’ Karen Chow details how robust extraction empowers semiconductor innovation at the most complex nodes.

Keysight EDA’s Stephen Slater examines how massively parallel GPU execution allows large FEM matrix systems to run efficiently.