Chip Industry Week In Review

Think tank IAPS’ report on AI integrity attacks contends that advanced AI systems must be protected from hidden tampering, backdoors, or unauthorized changes that could alter their behavior or outputs, especially when AI adoption is scaling rapidly, with over 60% of the federal workforce now using AI every day.

Geopolitics

• The U.S. government has drafted new export rules that may give Washington extensive control over global sales of advanced AI chips, reports Bloomberg.
• Chinese chip executives are pushing for the country to pool national resources to develop a comprehensive litho ecosystem — a Chinese ASML.
• The SIA weighed in on the Chip Security Act this week: “We cannot support blanket mandates for new, untested, and potentially infeasible on-chip mechanisms, such as what is being proposed in the Chip Security Act.”

The Mobile World Congress (MWC) in Barcelona this week included these developments:

• Arm and TECNO are collaborating on power-efficient, real-time generative AI on mobile devices.
• Qualcomm announced a 5G-Advanced 3GPP Release 19-ready modem-RF system, a Wi-Fi 8 portfolio, and a wearables platform.
• Nordic introduced its new cellular IoT chip families.
• AMD added new desktop processors with an NPU capable of ~50 TOPS for on-device AI workloads.
• Keysight and Qualcomm demoed their RF digital twins for massive MIMO development in 5G-Advanced and emerging 6G networks, as well as ML-based Channel State Information compression.
• MediaTek and Keysight created a working prototype for AI-driven uplink optimization and lifecycle management for next-gen RAN.

Big deals and funding

• proteanTecs received a strategic investment from TOPPAN’s TGVP venture arm to support global expansion.
• Nvidia inked multiyear purchase commitments and R&D agreements with Coherent and Lumentum to boost its access to advanced laser and optical interconnect technology. Nvidia is also investing $2B in each company.
• Automotive components maker Denso has made an acquisition proposal to Rohm, expected to be close to $8B.
• Imec is collaborating with and investing in Atlas Data Storage to develop and scale DNA digital data storage.
• Ayar Labs raised $500M to scale high-volume production and test capacity of its co-packaged optics.
• Neutral atom quantum company Pasqal raised ~$394M as part of its plans to go public.
• Nvidia currently doesn’t plan to make further investments in OpenAI or Anthropic.

Memory

• TrendForce expects NAND flash prices to jump 85% to 90% QoQ in Q1 2026. The combined revenue of the top five NAND flash suppliers rose ~24% in Q4 vs. Q3.
• Rambus unveiled HBM4E Controller IP that provides up to 16 Gbps per pin for 4.1 TB/s throughput to each memory device and includes advanced reliability features.
• Micron shipped 256GB LPDRAM SOCAMM2 modules with a monolithic 32Gb LPDDR5X design for AI data centers.
• Everspin expanded its HR xSPI STT-MRAM portfolio to 256Mb density.

Expansions

• ASML is considering expanding into advanced packaging equipment, the company told Reuters.
• Intel’s 18A process may now be offered to external customers, said Intel CFO David Zinsner during a call with Morgan Stanley.

Quick links to more news

Global
In-Depth
Funding, Deals, Reports
New Technology
Research
Automotive
Security
Trending Video
Events and Further Reading

In-Depth

Semiconductor Engineering published its Automotive, Security and Enabling Technologies newsletter this week, featuring:

• Auto Security Accelerates With Standardization And Certified Silicon
• Limiting AI/ML Tools To Ensure Physical AI Safety, Security
• New Automotive Architectures Are Shaking Up Processors And Memory Choices

Plus:

• Making Hybrid Bonding Better
• Tool And Methodology Changes Coming In Fab And Package Automation
• Tech Talk: New Challenges in Signoff
• Opinion: Follow The AI Leader

Global

Europe

• Fraunhofer plans to establish an AI chip design R&D center in Heilbronn, Germany.
• The UK is opening a new AI research lab, with £40M in government funding.
• The NanoIC pilot line released two interconnect pathfinding PDKs — a fine-pitch RDL PDK for polymer‑based substrates and a D2W hybrid bonding PDK.

Americas

• SIA submitted policy recommendations on the approval of new chemicals used in IC manufacturing, encouraging EPA reviewers to assess risks based on actual conditions, not a “one-size-fits-all model.
• OECD recently did deep dives into promoting and enabling semiconductor ecosystems in Mexico and the Dominican Republic. Both countries are eager to expand.

Asia

• Canon will be Rapidus’ first 2nm customer, reports Nikkei Asia.
• Qnity acquired a $61M research and manufacturing facility in Taiwan. The new site is expected to be operational in early 2027.
• TSMC expects to complete its new Tainan fab in 2028.
• Asian chip companies are planning record levels of 2026 capital spending, as well as raising prices.
• Micron opened its assembly and test facility in Sanand, Gujarat, India.
• Arm and Danantara Indonesia are partnering to boost the country’s semiconductor industry, including access to Arm products and training initiatives.

Fundings, Deals, Reports

Financial releases: Broadcom and Marvell.

WSTS released its finalized global semiconductor sales report for 2025, reflecting 26% year-over-year growth.

More deals and funding

• UMC and Infineon inked an MoU to reduce emissions across their shared supply chain.
• Soitec’s POI wafers will now be part of  Skyworks’ 5G mobile device tech.
• Vertical Compute raised ~$43M and taped out a test chip that integrates vertical memory stacks directly on compute logic within a single 300mm wafer process flow.

Insights, Opinions

• Tackling the Chips Talent Crunch (ISM)
• Why better chips will need more extreme physics (Berkeley, xLight)
• Job Growth in Counties Targeted by the CHIPS and Science Act (NBER)
• The Strategic Value of China’s High-Tech Drive (CSIS)
• Chinese De-Risking: Europe Needs to Accelerate (CEPA)
• Silicon Valley’s Self-Defeating Bid to Preempt DeepSeek (Bloomberg)
• Diary of an Advanced Lithographer: SPIE Advanced Lithography/Patterning conference insights (Chris Mack)

Research

Purdue University has been expanding its Quantum Code Library, which powers atomistic simulation tools that model the charge, heat, or spin transport and properties of semiconductors scaled as small as 2 or 3 nanometers.

PNNL developed systems that can convert commercially available, isotopically enriched, silicon and germanium materials into high-purity silane and germane for quantum and semiconductor R&D.

New papers:

• RPU — A Reasoning Processing Unit (Harvard)
• Quantum Simulations for EUV Photolithography (Xanadu, Berkeley et al)
• Light-induced damage in semiconductor device manufacturing (ARCNL, UvA, VU Amsterdam)
• Wafer-Scale SRAM CIM with Token-Grained Pipelining for LLM Inference (CAS)
• HBF Augmented Vector Engine for Large-Scale ANNS (Georgia Tech et al)
• Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler (Stanford)
• Dry resist process development toward depth of focus improvement in high NA EUV lithography (Lam, imec, ASML)

New Technology 

Siemens EDA added domain-scoped agentic AI workflows to its Questa One verification software portfolio, including agents for synthesizable RTL code generation, lint analysis configuration, clock domain crossing, verification planning, and root cause analysis.

Infineon released:

• Four new devices in its CoolGaN portfolio, integrating two 600 V GaN switches in a half-bridge configuration.
• ModusToolbox Power Suite, a software platform for digital power conversion designs based on PSOC Control C3 MCUs.
• A new integrated single-port USB Type-C power delivery MCU.

Apple debuted new laptop chips with an advanced packaging architecture that combines two 3nm dies into a single SoC that includes a CPU, scalable GPU, Media Engine, unified memory controller, Neural Engine, and Thunderbolt 5 capabilities.

Marvell introduced 1.6T ZR/ZR+ data center interconnect pluggable and 2nm coherent DSPs featuring MACsec.

Accellera published IP Abstraction for Clock and Reset Domain Crossing Integration 1.0, a new standard that enables interoperable, tool-independent CDC/RDC collateral exchange and signoff from IP to SoC design flows.

Tanaka Precious Metals announced a gold bump transfer technology for its sintered gold bonding technology, enabling bumps to be placed on chips and substrates with complex structures.

Design wins

• Innatera adopted Synopsys’ ESD and power integrity analysis simulation technology to help design neuromorphic chips for low-power edge AI applications.
• Inventec adopted Siemens DFM solutions to automate DFM verification and accelerate SMT preparation in its server and notebook product lines.
• Neurophos used Cadence tools to design and verify its miniature optical transistors.

Automotive

Insights

• An explosion of data from sensors for assisted/autonomous driving is placing unprecedented demands on memory and storage subsystems in vehicles.
• Chinese automakers are moving so rapidly in AV, EV and battery technology that US automakers will just be niche players if they don’t catch up, reports NYT.
• The rapid evolution of automotive cybersecurity is fundamentally transforming how industry standards, supplier relationships, and regulatory compliance are approached.

Policy

• Automotive supplier association CLEPA urged the European Commission to ensure the proposed Industrial Accelerator Act includes an assessment of  trade partners to avoid circumvention of rules and trade loopholes. The legislation is designed to increase demand for low-carbon, European-made technologies and products.

New vehicle technologies and deals

Infineon rolled out a number of automotive announcements, including:

• A motor-control SiP, integrating MCU, power stage, and drivers;
• A 28nm automotive security controller with PQC and Common Criteria certification;
• A 400 MHz option for its AURIX TC3x MCU family;
• An expansion of its DRIVECORE SW portfolio for faster SDV development and RISC-V readiness;
• Enhancing its automotive MCU portfolio with ISO/SAE 21434 compliance, CATARC certification, and PQC-ready features.

BYD rolled out its Blade Battery 2.0, charging from 10% to 97% in 9 minutes with a range of 621 miles.

In advance of Embedded World next week, RISC-V International previewed some of the RISC-V deployments, from ultra-low-power MCU-class cores and safety-critical automotive IP to vector-enabled processors, AI accelerators and toolchains.

Dataspeed plans to integrate Innoviz’s automotive lidar solutions into its Drive-by-Wire vehicle systems.

Aptera’s new solar vehicle rolled off its validation assembly line.

Vehicle research

A new low-power mmWave radar sensor called EyeDAR was developed by researchers at Rice University for autonomous vehicle applications. The orange-sized radar sensor can be mounted like roadside infrastructure to capture radar reflections that self-driving cars’ onboard sensors might not catch.

Fig. 1: EyeDAR System. Credit: Jared Jones/Rice University

University of Maryland researchers created a driving simulator that identifies the specific conditions that cause autonomous vehicles to skid or spin out, allowing engineers to test automated driving systems under extreme scenarios without any risk.

More vehicle technical papers

• • AI Chip Design Platform for Automotive and Industrial Applications (TUD)
  • Hijacking Your AV for Fun and Profit (Johns Hopkins, UCSC)
  • Multi-Modal 3D Object Detection under Modality Drop (U. of Alberta)
  • Battery Discharge Modeling for EVs (Cornell)
  • Resilient Voltage Estimation for Battery Packs Using Self-Learning Koopman Operator (Texas Tech)

Security

IDC predicts global security spending will reach $308B in 2026, up ~12% from last year.

Black Duck‘s newly released Open Source Security and Risk Analysis report shows a significant rise in open source threats and license conflicts in commercial codebases, finding vulnerabilities rose 107%.

SEALSQ is now offering a quantum-resilient vertical security stack, integrating hardware root of trust and PQC at the silicon level.

With support from Ferrous Systems, Arm is bringing Rust to  Cortex-R82/R82AE, allowing developers working with platforms such as Zena CSS to explore memory-safe development methods in high-performance real-time systems.

New Common Vulnerabilities and Exposures (CVEs):

• CVE-2026-21385 Qualcomm Multiple Chipsets Memory Corruption
• CVE-2026-22719 Broadcom VMware Aria Operations Command Injection
• More CISA alerts are here.

Recent security research

• EM Side-Channel Attacks on DNNs in Near and Far Field (Radboud et al)
• GPU Microarchitecture for Fully Homomorphic Encryption (Boston Univ. et al.)
• AI-Assisted Threat-to-Assertion Learning for SoC Security Verification (UCF)
• Systems-Level Attack Surface of Edge Agent Deployments on IoT (Imperial)
• Physical Layer Security for SC3 Closed Loop (Tsinghua)
• Attestable and Trusted Workflows out of Distrustful Components (Imperial, Microsoft)

Trending Video

New Performance Requirements For Audio: Cadence’s Prakash Madhvapathy talks about the advantages of coherent designs, how that impacts security, and how DSPs are evolving to meet consumer needs.

Events and Further Reading

Upcoming webinars are here, including:

• LPDDR6 Memory: A New Choice for AI Data Center Applications, Mar. 10
• Redefining Circuit Design Efficiency with ML-Driven EM Optimization, Mar. 12

Find upcoming chip industry events here, including:

Semiconductor Engineering’s complete collection of newsletters for all five channels can be found here.