Exponential increases in data and a mix of performance requirements are driving a top-to-bottom rethinking of what works best where.
Key Takeaways
An explosion of data from sensors for assisted and autonomous driving, and the need to make real-time decisions based on that data, are placing unprecedented demands on memory and storage subsystems in vehicles.
As more mechanical functions are replaced by electronics, and as the amount of intelligence in vehicles increases, automotive challenges are mirroring some of those found in large data centers. Moving data within and between processing elements and memories needs to be blazing fast for critical functions to prioritize critical functions such as automatic braking, lane centering, backup camera image processing, and suspension adjustments.
At the same time, these vehicles also include a mix of functions with varying criticality. For example, while parts of an infotainment system are essential for alerting drivers, others are not. The challenge here is managing the vehicle both as a single system and as a system of systems in which some functions take priority over others. And the best way to address that is by increasing the bandwidth, reducing the latency, and getting more granular about which components are needed where, using which manufacturing process, and at what cost.
“When we’re talking about something like 10-gigabit Automotive Ethernet with quality of service, traditional automotive engineers say, ‘How can I guarantee this signal actually gets to the brakes within 100 milliseconds?'” said David Fritz, vice president of hybrid-physical and virtual systems, automotive and mil/aero at Siemens EDA. “My response is, ‘You see that building two blocks away? If you took a twisted pair Ethernet wire, ran it around that building, and then all the way back here, that’s probably a few microseconds of delay, and you’re worried about milliseconds.’ That’s because the transmission rate is so high. Even if there’s some kind of arbitration that happens, you’ve got plenty of time to resolve that. So the whole worry about whether my data can get from point A to point B quickly enough when the system is busy is pretty much gone. And that concern about how to partition out my 1.5 megabit-per-second CAN bus to make sure that the data gets there just goes away. It’s the difference between a megabit and a gigabit.”
This has a big impact on the design of the vehicle. “If you’re sending a high-priority packet across the network from point A to point B, and the network is really busy because it’s a video frame — and I’ve got who knows what on that network because some OEMs are putting 16 and 20 cameras on the outside of cars these days — you want to process as much of that data as you can close to the edge of the vehicle,” said Fritz. “That reduces the bandwidth requirements. Chinese OEMs understand that if they send data from 20 cameras at high resolution all at once, and if there’s a collision, they can still process it, store the frames, and process the frames with AI. They can feed the AI algorithm quickly, because now they’ve got a lot of the SoC with nanosecond and picosecond latencies, whereas the competition has a couple of ECUs, and if they’re lucky, they have a couple of megabits communication channel between those separate ECUs. It comes down to designing a car like you would design an SoC.”
That also enables carmakers to use a variety of processing elements and memories, focusing on where the highest performance is required, where it can be scaled down, how much energy is required for different functions, and how much it all will cost.
“Traditionally, these functions relied on MPUs or DSPs, but there is now growing interest in leveraging GPUs for some of these tasks,” said Amir Kia, senior product manager at Imagination Technologies. “For instance, in the context of in-cabin infotainment and driving vehicle displays, many companies are already utilizing GPUs. Developers recognize that the flexibility of the GPU allows it to handle both compute and graphics tasks efficiently. Rather than integrating additional accelerators, they see value in expanding the capabilities of the existing GPU to manage infotainment and enhance compute performance, thus reducing system overhead. This shift also opens up opportunities to utilize smaller MPUs or minimize reliance on DSPs within these systems.”
Toward software-defined vehicles
Many of these shifts are foundational for automakers, which only in the past decade have begun shifting their focus from ECUs to software-defined approaches. The benefit is that different systems and subsystems can be designed like blocks in an SoC, then fused wherever and however it makes sense. That, in turn, makes it easier to determine how much bandwidth is needed and where, how much memory capacity is required, which types of memory work best where, and which data is of the highest priority.
“Everyone is trying to move to more centralized architectures,” said Kia. “We’re using a lot of distributed ECUs, and we want to move to a more centralized infrastructure. Some customers have very compute-heavy platforms, so there’s a lot of real-time data from sensors and displays. One customer has 6 cameras. Another has 8 to 12 cameras, all streaming at the same time. So there’s a lot of fast exchange of data within the system, and they’re trying to consolidate everything into one SoC to deal with that.”
SDVs are very different from a collection of function-specific ECUs. While different systems must perform the functions as required, the central logic in these vehicles is also capable of making real-time decisions that involve multiple systems. To do that, however, the right data needs to be available so it can be acted upon.
“High-resolution sensors, AI accelerators, and safety-critical workloads all converge on shared memory and storage subsystems, which quickly become performance bottlenecks without sufficient bandwidth,” said Adiel Bahrouch, director of business development for Silicon IP at Rambus. “If memory cannot feed the compute engines fast enough, silicon utilization drops and latency rises, directly impacting safety and user experience. A tiered memory and storage hierarchy, ranging from ultra-fast on-chip memory to high-capacity persistent storage, ensures that each workload is served with the right balance of bandwidth, latency, capacity, and cost, ultimately enabling safe, responsive, and feature-rich vehicles.”
As these architectural shifts reshape the automotive landscape, the selection of memory technologies becomes increasingly important. “As you progress from L3 to L4 and so on, the complexity, refinement, and efficiency of the models continue to be a focus for OEMs,” noted Michael Basca, vice president of product and systems at Micron Technology. “We’ve all seen some of the robotaxis get stuck in certain situations in traffic, so clearly we’re not quite at the point where the models can handle all of the various extreme corner cases. If anything, at those upper levels, the models are likely to still get bigger for some period of time before they can get more efficient, further out in time, on the storage side.”
At a more granular level, the type of memory deployed in electrified vehicles depends on how critical the response time is, the target market segment, and the source of the power for the vehicle. In a battery electric vehicle (BEV), the ability to go farther is a competitive advantage, and less power spent on moving data can extend a vehicle’s range. So while GDDR has greater capacity, LPDDR6 may be sufficient for a particular function.
“LPDDR memory was originally popular because it offered more bandwidth than DDR,” said Frank Ferro, group director for the Silicon Solutions Group at Cadence. “Original LPDDR4 is around 4 Gb/s. But with LPDDR6, we’re all the way up to 14.4 Gb/s of memory bandwidth. That’s the first important thing. You get a lot of bandwidth. Low power is also certainly important. Another thing is that it gives you a bit more memory capacity. LPDDR6 was not as big as DDR, but in automotive applications, as we get into ADAS and AI inference, capacity is becoming very important. LPDDR6 gives a balance of memory capacity and memory bandwidth and seems to be ticking a lot of boxes for automotive.”
Levels 4 and 5 autonomy add some new wrinkles to that equation, though. “The major tradeoffs in boosting on-chip memory capacity and bandwidth for advanced features are increased chip area and power consumption, which can affect thermal management and reliability,” said Daryl Seitzer, principal product manager for embedded memory IP at Synopsys. “Designers must balance performance requirements with energy and area constraints, often leveraging low-voltage operation and architectural optimizations.”

Fig. 1: ADAS bandwidth requirements. Source: Micron Technology
In addition, as language models get more complex in vehicles, users find they need more memory capacity and bandwidth, and they are trying to balance that against cost. “Take Tesla, for example, where you might discover four LPDDR memories,” Ferro said. “They were thinking, ‘We can go with less GDDR,’ but now they use the same amount for the capacity, so a lot of customers are looking to go LPDDR6 because now they need that capacity [plus the other benefits of LPDDR].”
High-bandwidth memory, which is stacked DRAM connected by through-silicon vias, is currently not an option for automotive today due to reliability issues involving TSVs and vibration. But it’s definitely on the radar of some companies due to the growing demand for high-performance memory, in some cases at the expense of lower-cost memory options.
“The memory industry is highly centralized, with few leading players taking monopoly positions, and the capacity is shared with all other industries,” said Yu Yang, principal analyst, automotive semiconductors at Yole Group. “Therefore, understanding of the memory industry is rather critical for OEMs with ambitions in the transformation. A rather recent example will be the skyrocketing price of DDR4 memories in the past months due to the AI demand, capacity shifting, and/or speculation in the distribution channels.”
The current breakdown of memory types and uses in automotive applications, according to Yole Group, include:
A general rule of thumb is that DRAM is used for compute, NAND for data, and NOR for code.
Other memory types
DRAM is getting much faster, and SRAM is still the go-to memory for the highest performance. Yet other types of memory are beginning to creep into automotive applications.
“SRAM supports real-time compute tasks, while MRAM and RRAM offer high-density, low-power, and persistent storage, making them well-suited for over-the-air updates, data logging, and configuration retention,” said Synopsys’s Seitzer. “These memory choices address the automotive industry’s needs for optimal power efficiency, performance, and reliability.”
In addition, some data can be pre-processed in a vehicle and stored locally before sending it to the cloud for less time-sensitive jobs, such as analyzing a vehicle’s behavior or mapping changes in a fleet of vehicles. “The data doesn’t go up to the cloud immediately, but rather, is stored for a few hours or up to one day, depending on which cloud provider (AWS, Microsoft Azure, Google Cloud) is utilized,” said Amit Kumar, director of product marketing and management for automotive, Tensilica Product Group at Cadence. “These types of data streams are commonly accumulated within the car itself, then the structured analysis is done in the data warehouse.”
Flash memory is especially useful for this. “Flash (non-volatile, long-term) remains common within ECUs and central controllers,” said Seitzer. “Non-volatile memory retains data for the vehicle’s lifetime, supporting persistent storage for firmware, logs, and security assets. Access to off-chip data leverages interfaces such as eMMC and UFS with PCIe for high-bandwidth applications. Security is ensured via encryption, authentication, and compliance with automotive safety standards.”
Each OEM determines its own memory and storage architecture based on a wide range of options and target markets.
“Camera recordings from external and, if enabled, cabin cameras can be used for ‘fleet learning’ to improve autopilot and full self-driving features, which are typically short clips captured in connection with a safety event such as a collision or airbag deployment,” said Carrie Browen, SDV business line product manager at Keysight EDA. “Tesla, for instance, describes separate categories, such as Autopilot Analytics & Improvements and Road Segment Data Analytics, which are used to train and refine driver-assist and navigation features. Some data, such as dashcam footage and Sentry Mode storage (to watch for threats around the parked car), is processed locally on the car unless you explicitly enable sharing. In practice, data lives partly on the vehicle and partly in Tesla-controlled data centers (and partner facilities) that support AI training, services, and support operations.”
Today, high-speed DRAM is typically utilized for near-compute memory, while flash and other non-volatile storage options provide data backup and redundancy. But those lines are starting to blur.
“Future architectures will leverage greater flexibility by using more hybrid memory tiers that integrate both traditional DRAM and flash memory within a single module or package,” Browen said. “For camera and sensor data used in AI improvement, labeling and review tools allow authorized employees and contractors to view short clips and images to annotate objects and driving scenarios. Media reports about past labeling operations describe such interfaces, but do not disclose their exact technical stack.”
Conclusion
Vehicles are becoming complex systems of systems that incorporate an increasing array of memories and processing elements, and new and better ways of moving and storing data.
“In-vehicle computing requirements, including infotainment and ADAS, are increasingly demanding memory bandwidth and capacity,” said Randy White, memory solutions program manager at Keysight EDA. “Low latency with in-vehicle inferencing, instead of cloud-based, ensures real-time processing and mission-critical timing.”
These are all stepping stones on the way to full autonomy. And given the trajectory of this technology, that could well happen in the not-so-distant future.
—Emma Riverso contributed to this article.
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