Chip Industry Week In Review


Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Chip Industry Week In Review


Infineon rolled out the world's first 300mm gallium nitride (GaN) wafer, opening the door for high-volume manufacturing of GaN-based power semiconductors. A 300mm wafer contains 2.3 times as many chips per wafer as a 200mm wafer. Fig.1: Infineon's 300mm GaN wafer. Source: Infineon The Semiconductor Industry Association released its 2024 State of the U.S. Semiconductor Industry report th... » read more

Driving Cost Lower and Power Higher With GaN


Gallium nitride is starting to make broader inroads in the lower-end of the high-voltage, wide-bandgap power FET market, where silicon carbide has been the technology of choice. This shift is driven by lower costs and processes that are more compatible with bulk silicon. Efficiency, power density (size), and cost are the three major concerns in power electronics, and GaN can meet all three c... » read more

Chip Industry Week In Review


The U.S. Department of Commerce issued a notice of intent  to fund new R&D activities to establish and accelerate domestic advanced packaging capacity. CHIPS for America expects to award up to $1.6 billion in funding innovation across five R&D areas, as outlined in the vision for the National Advanced Packaging Manufacturing Program (NAPMP), with about $150 million per award in each... » read more

Building CFETs With Monolithic And Sequential 3D


Successive versions of vertical transistors are emerging as the likely successor to finFETs, combining lower leakage with significant area reduction. A stacked nanosheet transistor, introduced at N3, uses multiple channel layers to maintain the overall channel length and necessary drive current while continuing to reduce the standard cell footprint. The follow-on technology, the CFET, pushes... » read more

Power Semis Usher In The Silicon Carbide Era


Silicon carbide production is ramping quickly, driven by end market demand in automotive and price parity with silicon. Many thousands of power semiconductor modules already are in use in electric vehicles for on-board charging, traction inversion, and DC-to-DC conversion. Today, most of those are fabricated using silicon-based IGBTs. A shift to silicon carbide-based MOSFETs doubles the powe... » read more

Goals of Going Green


The chip industry is stepping up efforts to be seen as environmentally friendly, driven by growing pressure from customers and government regulations. Some manufacturers have been addressing sustainability challenges for more than a decade, but they are becoming more aggressive in their efforts, while others are joining them. A review of sustainability reports across the semiconductor indust... » read more

Will CFETs Help The Industry Go Vertical?


Device scaling is getting much harder at each new process node. Even defining what it means is becoming a challenge. In the past, gate length and metal pitch went down and device density went up. Today, this is much harder for several reasons: • Short channel effects limit gate-length scaling; • Parasitic effects limit device density, and • Metal resistance limits metal pitch. So r... » read more

Startup Funding: February 2023


The cost of borrowing is going up, but investors continued to pour money into the chip industry in February. Collectively, 132 companies raised more than $4.5 billion last month. One of the big beneficiaries was quantum computing, with nine companies drawing a total of more than $500 million. The bulk of that went to a quantum software and services company spun out of Alphabet, but plenty wa... » read more

The March Toward Chiplets


The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

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