The Fundamentals Of Software Testing


Recently, I had a conversation with Paul Gerrard, the internationally renowned, award-winning software engineering consultant, author, and coach. We discussed the fact that testing is at the heart of software development. Obviously, as testers, we spend all day testing and thinking about testing. But developers test every line of code they write. Sometimes, users test. In fact, the all-perva... » read more

Data Coherence Across Silos And Hierarchy


Shift left has become a rallying cry for the chip design industry, but unless coherent data can flow between the groups being impacted, the value may not be as great as expected. Shift left is a term that encompasses attempts to bring analysis and decision-making forward in the development process. The earlier an issue can be found, the less of a problem it ultimately becomes. But in many ca... » read more

Investing in EV Battery Testing — Benefits for EV Battery Designers


Phasing out gas-powered internal combustion engines (ICE) and moving towards clean energy electric vehicles (EVs) brings substantial technology investments to deliver EVs to the mainstream market. Government legislation to eliminate or limit the production of ICEs by 2035 is creating a surge in demand for the EV ecosystem. This in turn, is driving demand for more efficient ways of EV battery sy... » read more

Blog Review: June 26


Cadence's Neelabh Singh examines the Gen4 link recovery mechanism in USB4 Version 2.0, an autonomous process that is initiated by a router when it encounters uncorrectable error events, and identified verification challenges. Synopsys' Gary Ruggles and Priyank Shukla highlight improvements to PCIe 7.0 that will enable secure data transfers and boost bandwidth for the next generation of AI an... » read more

Blog Review: June 19


Siemens' John McMillan and Todd Burkholder suggest using an automatic formal-based approach to verifying chiplet package connections early in the design process. Cadence's Veena Parthan explores the intricacies of wind tunnel testing in automotive design and how the collaborative relationship between computational fluid dynamics (CFD) and wind tunnels has resulted in accelerated and more nua... » read more

Temperature: A Growing Concern For Chip Security Experts


While everyone in the semiconductor industry wants to have the hottest new product, having that type of temperature manifest in a literal sense poses a threat not just to product stability and performance but to the security of the chips themselves. Temperature has become an object of fascination to security researchers due to the vagaries of how the physical properties of heat affect perfor... » read more

When To Expect Domain-Specific AI Chips


The chip industry is moving toward domain-specific computation, while artificial intelligence (AI) is moving in the opposite direction, creating a gap that could force significant changes in how chips and systems are architected in the future. Behind this split is the amount of time it takes to design hardware and software. In the 18 months since ChatGPT was launched on the world, there has ... » read more

Blog Review: June 12


Cadence's Deep Mehta finds that PCIe 6.0 switches need advanced verification strategies that delve deeper than basic functionality, such as generating backpressure traffic to identify potential performance bottlenecks and ensure the switch operates optimally in real-world scenarios. Siemens' Reetika explains why proper management and verification of reset domain crossing (RDC) paths are cruc... » read more

Toward A Software-Defined Hardware World


Software-defined hardware may be the ultimate Shift Left approach as chip design grows closer to true co-design than ever with potential capacity baked into the hardware, and greater functionality delivered over the air or via a software update. This marks another advance in the quest for lower power, one that’s so revolutionary that it’s upending traditional ideas about model-based systems... » read more

Blog Review: June 5


Cadence's Neelabh Singh provides an overview of the low power entry and exit flows in USB4 Version 2.0 link speed and how they have been simplified by making low power entry uni-directional and removing the need for certain handshakes for low power exit of the re-timers. In a podcast, Siemens' Steph Chavez chats with Daniel Beeker of NXP about the foundational importance of power distributio... » read more

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