Blog Review: Jan. 14


Arm's Paul Black demonstrates how lightweight LLVM sanitizers help detect undefined behavior, improve code quality, and expose hidden bugs in embedded C and C++ projects, with a focus on two sanitizers that can catch issues such as unsigned signed shift overflows, array overflows, and stack corruption. Imagination's Alex Pim provides an overview of LLM inference acceleration for mobile and e... » read more

Chip Industry Week in Review


SIA's latest monthly global semiconductor sales report reflects a ~30% YOY increase, hitting a record $75.3B in November 2025. Asia Pacific had a notable 66% increase. Cadence launched its Chiplet Spec-to-Packaged Parts ecosystem to accelerate time to market for chiplet development for physical AI, data centers, and HPC applications. Initial IP partners joining Cadence include Arm, Arteris, ... » read more

Airbus A320 Recall: Rethinking Fault Testing In Aerospace


Fault injection is usually discussed in the context of security, where adversaries deliberately induce faults to bypass protections or extract sensitive information. In safety engineering, by contrast, faults are often treated as rare, random events driven by natural or environmental factors. The recent Airbus A320 recall is a good example of how a primarily safety incident can still benefit fr... » read more

Is End-To-End Security Possible?


Looming financial penalties for data breaches are forcing chipmakers to confront end-to-end security, an increasingly complex and daunting problem because no single company controls all the pieces anymore. This is especially apparent in multi-die assemblies, in use today in data centers, and under consideration in automotive and other applications. Multiple chiplets can push performance well... » read more

Five Tips To Avoid Security Errors In Product Development


Riscure, now part of Keysight, has been helping chip vendors and device manufacturers improve the security of their products for years. The security scenario has changed a lot over time. The attacker profile evolved from individuals motivated by curiosity, with very limited resources and attack potential, to well-funded and organized adversaries with malicious motivations and the capacity to ex... » read more

Blog Review: Jan. 7


Cadence's Reela Samuel presents an overview of through-silicon vias, including structure, pitch, and electrical behavior, key layout rules such as keep-out zones and stress constraints, and how TSV parasitics influence bandwidth, latency, and system-level performance. Siemens' Andras Vass-Varnai identifies five thermal trends to watch and how they’ll reshape design and packaging workflows ... » read more

Blog Review: Dec. 24


Cadence's Jakob Engblom shares highlights from the recent SDV Europe conference, including why software-defined vehicles will require much closer, faster collaboration between suppliers and customers, with virtualization for software development and testing taking on a key role, as well as API questions and tire sensors. Synopsys' Tom De Schutter and Marc Serughetti predict that new cars wil... » read more

When To Move To Multi-Die Assemblies


As chip designs become larger and more complex, especially for AI and high-performance computing workloads, it's often not feasible to fit everything onto a single planar die. But determining when to move to a multi-die assembly isn't always straightforward. Multi-die approaches have some well-documented benefits. They allow designers to split functions across different dies, which can impro... » read more

Transforming Data Management In EDA: Preparing For The AI Era


In today’s fast-paced electronics design automation (EDA) environment, effective data management has become essential. Growing design complexity, distributed teams, and the accelerating adoption of AI/ML are pushing organizations to rethink how they manage, track, and leverage decades of engineering data. From manual workarounds to data management Many engineers discover the importance ... » read more

Accelerating Semiconductor Innovation Through Machine Learning-Driven Modeling


The semiconductor industry is entering an era of unprecedented complexity, driven by advanced architectures such as Gate-All-Around (GAA) transistors, wide-bandgap materials like GaN and SiC, and heterogeneous integration strategies. Traditional physics-based modeling approaches are increasingly challenged by nonlinear effects, electro-thermal interactions, and variability across device geometr... » read more

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