Blog Review: Jan. 7

Cadence’s Reela Samuel presents an overview of through-silicon vias, including structure, pitch, and electrical behavior, key layout rules such as keep-out zones and stress constraints, and how TSV parasitics influence bandwidth, latency, and system-level performance.

Siemens’ Andras Vass-Varnai identifies five thermal trends to watch and how they’ll reshape design and packaging workflows as the rise of 3D ICs, wafer-scale integration, and kilowatt-class AI accelerators place increasing importance on early thermal analysis.

Synopsys’ Thomas Andersen anticipates that for AI-assisted design to move beyond speed and into quality, the reasoning of experienced engineers will have to be captured and structured so AI can act with guardrails.

Keysight’s Jessy Cavazos and Giovanni D’Amore chat about why 6G is much more than just “5G but faster” with new innovations like reconfigurable intelligent surfaces and RF photonic integration poised to change key aspects of the physical layer and network architecture.

Imagination’s Andrea Battistella explores why finite time and resources require models to balance the importance of speed, cost, and accuracy, and shares examples of different models with specific tradeoffs prioritized to meet particular needs.

Ansys’ Laura Carter checks out how rapid advancements in electrification and connectivity are changing the automotive industry, including the impact of increasing vehicle complexity, the reprioritization of autonomous investments, and how simulation can help OEMs navigate these trends.

Arm’s Aaron Brailsford introduces a new bug bounty program for Trusted Firmware, initially covering four open-source projects that provide core security foundations across many Arm-based systems.

SEMI’s Ana Bernardo highlights the potential of smart manufacturing and how it could help Europe’s automotive industry overcome the challenges of a rapidly changing market.

Start the year with one of the ten most-watched videos of 2025, which covered verification, agentic AI, DRAM/HBM, optimization of data movement, chiplets, and heterogeneous integration. Or check out these recent additions:

Reliability And Traceability In Advanced Packages and how to find the root cause of a failure in a multi-die assembly.

How Generative AI In Chip Manufacturing works, what it can do, and what can go wrong.

How multi-die assemblies are changing design for test as DFT Shifts Further Left.

AI-Driven Collaboration In Chip Manufacturing and how agents can shorten time to market through secure sharing of data by machines.

Challenges In Testing Photonics In Chips and the impact of combining electrical and optical test in a single device.

Why digital and analog engineers must now find common ground with Changes In Mixed-Signal IC Verification.

Advanced Process Control In Semiconductor Manufacturing and the past, present, and future of managing wafer processes in the fab.

How production analytics can Improve IC System Quality And Performance over time.

LPDDR6 Is Not Just For Mobile Anymore as the go-to-DRAM for low-power devices is pushing beyond its roots.

New concerns and challenges for memory in AI data centers and the Critical Factors For Storing Data In DRAM.

Using AI/ML To Find And Correlate IC Test Data to pinpoint the root cause of low yield in chip manufacturing.

How to keep everything synchronized in a chiplet-based design with Multi-Die Verification.

The Rise Of AI Co-Processors and why keeping AI hardware current and relevant is becoming a challenge.

Coherent vs. non-coherent interfaces, heterogeneous vs. homogeneous, and other Benefits And Challenges Of Using Chiplets.

How in-device monitoring can improve the reliability and lifespan of semiconductors through Silicon Lifecycle Management.

Where Virtual Metrology In Semiconductor Manufacturing works best and why.

The potential of Virtual Twins is enormous, but building them is far from simple.

The Evolution of DRAM and how and why this tried-and-true memory is changing.

Using AI For Fault Detection And Classification In Manufacturing, supervised vs. unsupervised FDC, and the impact on yield.

The Challenges In Stacking HBM and what changes are needed to stack 24 layers of high-bandwidth memory.

Preparing For The Quantum Computing Age by designing chips and systems to withstand brute-force attacks by quantum computers.