Coherent vs. non-coherent interfaces, heterogeneous vs. homogeneous, and other considerations with chiplets.
The move to chiplets opens the door to more features than can be packed into a reticle-sized SoC. That potentially means more processing power, simpler designs, and higher yields. But it’s not as simple as swapping LEGO blocks into a chassis. Ashley Stevens, director of product management and marketing at Arteris, talks with Semiconductor Engineering about the challenges of using coherent versus non-coherent interfaces between chiplets, the implications of heterogeneous versus homogeneous chiplets, and the impact on partitioning and derivative designs.
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