Challenges In IP Reuse


Jeff Markham, software architect at ClioSoft, explains why IP reuse is so important in advanced process node SoC chip designs, what companies need to keep track of when working with third-party IP, and how it needs to be characterized. » read more

IP Management And Development At 5/3nm


The growing complexity of moving to new process nodes is making it much more difficult to create, manage and re-use IP. There are more rules, more data to manage, and more potential interactions as density increases, both in planar implementations and in advanced packaging. And the problems only get worse as designs move to 5nm and 3nm, and as more heterogeneous components such as accelerato... » read more

SOC Design & IP Management—A Must For Functional Verification


As a part of the verification flow, verification teams perform different types of simulations based on the nature of the design. The simulations include digital logic functional simulations, mixed-signal functional simulations, power-aware simulations, formal verification runs and gate-level simulations. For a signoff, all planned tests must pass in all four types of simulations. In addition t... » read more

The Rapid Success Of IP Reuse


The rise of IP use and reuse quickly became a challenge in the early 1990s as designs became more complex. Design teams quickly found themselves struggling to manage not only the vast numbers of IP cores that they were reusing but also versioning, permissions, legal approvals and so on. In the 1990s, software developers were established users of software configuration management (SCM) tools ... » read more

Design Reuse Vs. Abstraction


Chip designers have been constantly searching for a hardware description language abstraction level higher than RTL for a few decades. But not everyone is moving in that direction, and there appear to be enough options available through design reuse to forestall that shift for many chipmakers. Pushing to new levels of abstraction is frequent topic of discussion in the design world, particula... » read more

Don’t Be The Dinosaur On IP Reuse


In today’s competitive marketplace, IP assets are becoming more critical and strategic than ever before. There is a general understanding among all design companies that one needs to invest and reuse IPs within the enterprise for faster realization of an IP sub-system or an SoCs. Unfortunately, from the start most companies have failed to adopt the processes for developing and reusing their I... » read more

designHUB: Design Reuse Made Real


It’s no secret: You can’t get to market quickly or efficiently without integrating and re-using IP technology in your system-on-chip (SoC) design. In the past 10 years alone, design re-use has doubled to the point where today you’ll find more than 150 reused blocks comprising 60-70% of the die area in an average SoC. The companies most successful with their IP-reuse strategies are thos... » read more

The Limits Of IP Reuse


The basic business proposition for third-party IP is that it's cheaper, faster, and less problematic to buy rather than build. But things haven't exactly worked out according to plan, either for companies that license IP or those that develop it. For [getkc id="43" kc_name="IP"] licensees, just keeping track of an endless series of updates is becoming unwieldy. Complex designs often include ... » read more

IP Business Changing As Markets Shift


Semiconductor Engineering sat down to discuss IP protection, tracking and reuse with Srinath Anantharaman, CEO of [getentity id="22203" e_name="ClioSoft"]; and Jeff Galloway, CTO of Silicon Creations; Marc Greenberg, group director of product marketing for [getentity id="22032" e_name="Cadence"]'s IP Group; and John Koeter, vice president of marketing for [getentity id="22035" e_name="Synopsys"... » read more

Re-Using IP In Packaging


For the past decade, the promise held forth by advanced packaging was that it would allow chipmakers to mix and match analog and digital IP without worrying about the process node at which they were developed or the physical interactions between components. This is a big deal when it comes to analog. Analog IP doesn't benefit from node shrinking the way digital logic does, and in many cases ... » read more

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