Blog Review: Jan. 14

Arm’s Paul Black demonstrates how lightweight LLVM sanitizers help detect undefined behavior, improve code quality, and expose hidden bugs in embedded C and C++ projects, with a focus on two sanitizers that can catch issues such as unsigned signed shift overflows, array overflows, and stack corruption.

Imagination’s Alex Pim provides an overview of LLM inference acceleration for mobile and edge devices and introduces two key performance metrics: Time to First Token, which is the time it takes to execute compute workloads for the prefill mode, and Inter-Token Latency, which is the time it takes to execute compute workloads for the decode mode.

Siemens’ Kyle Fraunfelter and Melville Bryant argue that integrated software and automation solutions are essential for simultaneously achieving sustainability goals and operational excellence in semiconductor manufacturing, in a 5-part blog series spanning key challenges, digital twins, predictive maintenance, and AI optimization.

Cadence’s Vaibhav Sirvi explains how VESA Adaptive Sync for DisplayPort keeps the refresh rate of both GPU and monitor synchronized to avoid screen stuttering or tearing.

Synopsys’ Sangeeta Kulkarni checks out what’s new in CXL 4.0, which doubles the data rate to 128 GT/s per lane to align with PCIe 7.0.

Keysight’s Jessy Cavazos and Francisco Garcia discuss why 6G will only succeed if what is built can be validated, especially when it comes to AI in the physical layer and combining joint communications and sensing with semantic communications.

Ansys’ Aliyah Konarkowski explores ways to reduce the amount of virgin plastic produced through improved material sourcing, better sorting of plastic waste for recycling, and using materials and structural simulation to ensure high-quality parts can be manufactured from recycled plastics.

SEMI’s Jatin Mendiratta highlights a European research and innovation project to reduce the usage of harmful chemicals from chip production, cut emissions and waste, and make the industry more circular and resilient.

Plus, check out the blogs featured in the latest Automotive, Security & Emerging Technologies and Test, Measurement & Analytics newsletters:

Technology strategy advisor Geoff Tate explains why data centers need high reliability semiconductors.

Rambus’ Berardino Carnevale details how SoC designers can leverage certified cryptographic IP for secure and scalable solutions.

Keysight’s Marc Witteman shows how safety mechanisms for rare events can become unreliable under sustained or intense fault conditions.

Imagination’s Andrea Battistella explains why balancing speed, cost, and accuracy is necessary to creating models suited for different purposes.

Synopsys’ Dana Neustadter and Vincent van der Leest examine the integrity and confidentiality of data as it traverses the network.

Siemens EDA’s Vlada Kalinic looks at how to increase confidence in the correctness of hardware designs by ensuring equivalence of synthesizable C++/SystemC designs against RTL.

Cadence’s Reela Samuel explains why manufacturing-aware system design treats dies, interposers, packages, and analysis as a single, coherent system.

Onto Innovation’s Jason Lin shows how to detect surface anomalies, subsurface inclusions, and stress-induced defects in glass carriers with precision.

PDF Solutions’ Christophe Begue rethinks how manufacturers collaborate, leverage data, and deploy AI-driven automation.

Synopsys’ Graham Woods looks at the impact of localized clock management and DVFS for mitigating functional failures caused by workload-induced voltage.

Teradyne’s Alexander Metzdorf explains why modern ATE is needed for flexible and scalable accuracy as sensor data streams grow.

Siemens EDA’s Jayant D’Souza examines scan diagnosis for improving yield and accelerating time to market.