AI Workloads at the Edge: Ensuring Performance, Privacy, and Security


Experts At The Table: Semiconductor Engineering gathered a group of experts to discuss why some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy. The panel included Frank Ferro, group director in the Silicon Solutions Group at Cadence; Eduardo Montanez, vice president a... » read more

Blog Review: Dec. 17


Cadence's Shyam Sharma checks out what's new in the latest Open NAND Flash Interface 5.2 standard, including a Separate Command Address protocol that allows Hosts to optimize the command and data scheduling to increase overall available bandwidth. Siemens' Kyle Fraunfelter and Melville Bryant contend that improving semiconductor manufacturing and fab sustainability starts with a digital twin... » read more

Chip Industry Week in Review


Deals of the week: Arteris announced plans to acquire cybersecurity provider Cycuity. “Expanding our technology portfolio to include Cycuity’s hardware security assurance products will enable our customers to achieve secure on-chip data movement,” said Charlie Janac, chairman and CEO of Arteris. Qualcomm acquired Ventana Micro Systems, a maker of RISC-V data center-class CPU IP. ... » read more

Limited by Power


AI is seen as a massive computation problem, but that is not the case, at least with the way that the problem is structured today. It is a data movement problem. This not only limits performance but represents most of the energy consumption. In addition, the industry spends most of its time and effort making small improvements that optimize aspects of the existing architecture, when what is ... » read more

Chip Industry Week in Review


Major Deals: Taiwan-based UMC is exploring possible collaboration with Polar Semiconductor for high-volume production of 8-inch wafers at Polar’s expanded Minnesota fab, a move that could provide domestic manufacturing capacity for automotive, data center, consumer, aerospace, and defense customers. Marvell will acquire Celestial AI for $3.25B, adding photonic fabric technology for o... » read more

What The EU Cyber Resilience Act Means For Digital Product Makers


The EU Cyber Resilience Act (CRA) is set to become a defining regulation for all manufacturers and developers of digital products that touch the EU market. It introduces strict requirements for cybersecurity practices, risk management, and compliance procedures, affecting a wide range of stakeholders from software developers to hardware vendors. This article unpacks what the CRA is, who it af... » read more

Small Language Models Create New Security Risks


The rollout of edge AI is creating new security risks due to a mix of small language models (SLMs), their integration into increasingly complex hardware, and the behavior and interactions of both over time. AI data centers still garner the most attention due to massive investments and an ongoing flood of deals and acquisitions, but the edge is quietly starting to take shape for several reaso... » read more

Physical AI Takes Functional Safety Cues From Automotive


Robots are becoming smarter, more capable, and more pervasive, setting the stage for a whole new round of growth that will touch nearly every part of the semiconductor and software industries for decades to come. Robots are at the core of physical AI, a broad segment of edge AI systems that interact with the world through artificial intelligence and sensors. This includes everything from hum... » read more

Don’t Get Knocked Off the Curve: Fault Injection on Elliptic Curve Cryptosystems


Elliptic Curve Cryptography (ECC) is a core component in securing digital systems, widely used in applications ranging from internet communications to embedded devices. It supports key cryptographic protocols such as the Elliptic Curve Digital Signature Algorithm (ECDSA) and Elliptic Curve Diffie-Hellman (ECDH), both of which rely on the presumed difficulty of underlying mathematical problems. ... » read more

Blog Review: Dec. 3


Cadence's Reela Samuel notes that as multi-die integration becomes the new engine of semiconductor performance, the decision between 2.5D and 3D-IC architectures shapes a design's achievable bandwidth, energy efficiency, thermal limits, system size, and even program schedules. Synopsys' Thomas Andersen suggests that the deployment of physical AI will require the fusion of advanced electronic... » read more

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