tag: KLA-Tencor

What the Experts Think
By Sandra Liu - 20 Dec, 2017 - Comments: 0

Coventor recently sponsored an expert panel discussion at IEDM 2017 to discuss how we might advance the semiconductor industry into the next generation of technology. The panel discussed alternative methods to solve fundamental problems of technology scaling, using advances in semiconductor architectures, patterning, metrology, advanced process control, variation reduction, co-optimization and ... » read more

Will Fab Tool Boom Cycle Last?
By Mark LaPedus - 18 Dec, 2017 - Comments: 2

Fab equipment spending is on pace for a record year in 2017, and it now appears that momentum could continue into 2018. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in [getkc id="208" comment="3D NAND"] and, to a lesser degree, [getkc id="93" kc_name="DRAM"]. In the logic/foundry business, however, equipment deman... » read more

Process Window Discovery And Control
By Andrew Cross - 18 Dec, 2017 - Comments: 0

With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Additionally, semiconductor manufacturers’ use of desi... » read more

The Next 5 Years Of Chip Technology
By Ed Sperling - 18 Dec, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the future of scaling, the impact of variation, and the introduction of new materials and technologies, with Rick Gottscho, CTO of [getentity id="22820" comment="Lam Research"]; Mark Dougherty, vice president of advanced module engineering at [getentity id="22819" comment="GlobalFoundries"]; David Shortt, technical fellow at [getentity id="22876" co... » read more

Nontraditional Post Develop Inspection And Review Strategy For Via Defects
By KLA - 18 Dec, 2017 - Comments: 0

A viable in-line monitor for missing vias in the back end of line (BEOL) has traditionally been challenging due to the nature of the defects. Today’s available solutions do not meet the requirements of a true in-line and at-level monitor strategy. These solutions either indirectly monitor the defect further down the line, put production at risk of damage or contamination due to exceeding stri... » read more

The Next 5 Years Of Semiconductor Technology
By Sandra Liu - 21 Nov, 2017 - Comments: 0

New, advanced semiconductor processing and architectural technologies take years to perfect and put into production. In the meantime, semiconductor customers continue to demand faster, smaller and higher functioning devices. Semiconductor manufacturers need to decide whether (and when) to jump to the next generation of devices and production technologies, weighing the risk and benefit of bringi... » read more

Here Comes High-Res Car Radar
By Mark LaPedus - 20 Nov, 2017 - Comments: 1

A dozen or so startups are developing high-resolution radar chips that use various modulation schemes and processes, such as CMOS, FD-SOI and even metamaterials. In theory, high-resolution radar could boost the capabilities of today’s radar for cars, as well as eliminate the need for a separate LiDAR system. But the technology is still in the research stage and has yet to be proven commerc... » read more

Variation Spreads At 10/7nm
By Ed Sperling - 16 Nov, 2017 - Comments: 6

Variation between different manufacturing equipment is becoming increasingly troublesome as chipmakers push to 10/7nm and beyond. Process variation is a well-known phenomenon at advanced nodes. But some of that is actually due to variations in equipment—sometimes the exact same model from the same vendor. Normally this would fall well below the radar of the semiconductor industry. But as t... » read more

Overlay Challenges On The Rise
By Mark LaPedus - 16 Nov, 2017 - Comments: 2

The overlay metrology equipment market is heating up at advanced nodes as the number of masking layers grows and the size of the features that need to be aligned continue to shrink. Both ASML and KLA-Tencor recently introduced new [getkc id="307" kc_name="overlay"] metrology systems, seeking to address the increasing precision required for lines, cuts and other features on each layer. At 10/... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 27 Oct, 2017 - Comments: 0

Chipmakers At this week’s International Wafer-Level Packaging Conference (IWLPC), Samsung disclosed details about its efforts in the panel-level fan-out market. Samsung as well as ASE, Nepes and others are developing a next-generation fan-out technology using a panel-level format. In panel-level fan-out packaging, you can put more die on a panel as compared to a traditional round wafer, w... » read more

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