Chip Industry’s Technical Paper Roundup: Dec 5


New technical papers recently added to Semiconductor Engineering’s library: [table id=171 /] More ReadingTechnical Paper Library home » read more

Chiplets For Generative AI Workloads: Challenges in both HW and SW


A new technical paper titled "Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets" was published by researchers at University of Pittsburgh, Lightelligence, and Meta. Abstract "Fast-evolving artificial intelligence (AI) algorithms such as large language models have been driving the ever-increasing computing demands in today's data centers. Heterogeneous c... » read more

Sweeping Changes For Leading-Edge Chip Architectures


Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

Week In Review: Design, Low Power


U.S. President Joe Biden issued an executive order to restrict U.S. investment in Chinese companies, targeting semiconductors and microelectronics, quantum information technologies, and artificial intelligence systems with military or intelligence applications. Specific technologies within these groups will be defined later. Some will only require investors to notify the Department of the Tre... » read more

Week In Review: Design, Low Power


Keysight Technologies said it intends to acquire ESI Group for €913 million (~$998.6 million). ESI Group provides virtual prototyping solutions for the automotive and aerospace end markets that can create real-time digital twins to simulate a product's behavior during testing and real-life use. MLCommons announced the latest results from two MLPerf benchmark suites. One aims to measure the... » read more

Software-Defined Hardware Architectures


Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

True 3D Is Much Tougher Than 2.5D


Creating real 3D designs is proving to be much more complex and difficult than 2.5D, requiring significant innovation in both technology and tools. While there has been much discussion about 3D designs, there are multiple interpretations about what 3D entails. This is more than just semantics, however, because each packaging option requires different design approaches and technologies. And a... » read more

Self-Heating Issues Spread


With every new node there are additional physical effects that must be considered, but not all of them are of the same level of criticality. One that is being mentioned more frequently is self-heating. All devices consume power and when they do that, it becomes heat. "In essence, all active devices generate heat as carriers move, creating channels for current to pass through the gates," says... » read more

Dealing With Performance Bottlenecks In SoCs


A surge in the amount of data that SoCs need to process is bogging down performance, and while the processors themselves can handle that influx, memory and communication bandwidth are straining. The question now is what can be done about it. The gap between memory and CPU bandwidth — the so-called memory wall — is well documented and definitely not a new problem. But it has not gone away... » read more

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