Fab Equipment Challenges For 2019

By Mark LaPedus - 17 Dec, 2018 - Comments: 0

After a period of record growth, the semiconductor equipment industry is facing a slowdown in 2019, in addition to several technical challenges that still need to be resolved. Generally, the equipment industry saw enormous demand in 2017, and the momentum extended into the first part of 2018. But then the memory market began deteriorating in the middle of this year, causing both DRAM and NAND ... » read more

The Long Pause

By Ed Sperling - 07 Jun, 2018 - Comments: 0

Carmakers are leaping over each other to roll out cars that meet SAE Level 3 requirements, whereby under some conditions drivers can let go of the steering wheel. Getting to Level 5 will take a lot longer, and there is some debate about where and even whether Level 4 will ever happen (see Fig. 1). Fig. 1: Levels of autonomy. Source: Auto Alliance There are two big gaps that need to be a... » read more

The Implementation Of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies

By Moortec - 13 Dec, 2017 - Comments: 0

This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

Semiconductor Wafer Demand: Growing Pains

By Joanne Itow - 20 Nov, 2017 - Comments: 0

Semico Research is forecasting total semiconductor unit growth to exceed 13% this year, the first double-digit growth year since 2010. The exceptional unit growth is what the industry hopes for, but it does come with some growing pains. MOS logic, optoelectronics, MEMS and sensors, and even analog and discrete products are experiencing more than 10% unit growth in 2017. The challenge is that... » read more

Equipment Sales Were Mixed Bag In 2015

By Ed Sperling - 11 Jan, 2016 - Comments: 0

Semiconductor equipment billings were up in Q3 of 2015, the most recent statistics available from SEMI, compared with Q3 of 2014. The strongest growth was reported in China, which grew 63%, and Taiwan, which was up 22%. Billings in North America were down 23%, while in Korea they were down 22%. Europe was down 36%. Japan was up 2%, which is consistent with the growth seen in recent EDA C... » read more

Tech Talk: Configurable Logic

By Ed Sperling - 08 Oct, 2015 - Comments: 0

Cliff Lloyd, business development director at NXP Semiconductors, talks about designing in one part for many functions to reduce power consumption and cost. [youtube vid=ut5kCm0kNwE] » read more

Programmable Risk Factors

By Ernest Worthman - 07 Jul, 2014 - Comments: 0

The semiconductor industry is starting to come around to the realization that security begins at the block level. Intellectual property (IP) is being seen with IP blocks that can be woven into the general-purpose system-on-chip (SoC) hardware layers to secure I/O, data, keys, and various other sensitive or critical information. But modifying hardware designs in response to the demands placed... » read more

Relocating Intelligence

By Ed Sperling - 23 Oct, 2009 - Comments: 0

For the past couple of decades, intelligence in a system was largely a function of the logic in a processor. That may change, given some of the disparate discussions now under way across the electronics industry. Putting all the intelligence in one place can make the design process more efficient, but it doesn’t necessarily make the system more efficient, either from a performance or pow... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: logic