tag: low-power design

Pushing Batteries Too Far?
By Ed Sperling - 06 Apr, 2017 - Comments: 0

Reports of battery fires in consumer devices are not abating. The culprit in almost all cases is the lithium-ion battery. In some cases, this is a manufacturing issue, where predictable intervals of failure can point to a breach in the membrane separating the anode and cathode or a metal particle contaminant that causes a short circuit. Those kinds of flaws are well understood, based upon ho... » read more

Self-Driving Cars Rattle Supply Chain
By Ann Mutschler - 06 Apr, 2017 - Comments: 0

Automotive compute workloads are consolidating as carmakers push toward autonomous vehicles, but the changes necessary to make this all work are causing huge disruptions in an industry that has fine-tuned its supply chain over more than a century. Consolidation is essential for a variety of reasons, including efficiency of the computations, complexity management, and lower deployment costs. ... » read more

HBM Upstages DDR In Bandwidth, Power
By Ann Mutschler - 30 Mar, 2017 - Comments: 1

For graphics, networking, and high performance computing, the latest iteration of high-bandwidth memory (HBM) continues to rise up as a viable contender against conventional DDR, GDDR designs, and other advanced memory architectures such as the Hybrid Memory Cube. [getkc id="276" kc_name="HBM"] enables lower power consumption per I/O and higher bandwidth memory access with a more condensed f... » read more

TFETs And/Or MOSFETs For Low-Power Design
By Katherine Derbyshire - 16 Mar, 2017 - Comments: 0

As discussed in Reducing Subthreshold Swing With TFETs, papers at December’s IEEE Electron Device Meeting examined a variety of potential designs for tunneling transistors (TFETs). That focus continued at the recent CS International Conference. In particular, Nadine Collaert discussed IMEC’s work on InGaAs homo-junction devices. Many compound semiconductor devices depend on heterojunctio... » read more

TFETs Cut Sub-Threshold Swing
By Katherine Derbyshire - 16 Mar, 2017 - Comments: 0

One of the main obstacles to continued transistor scaling is power consumption. As gate length decreases, the sub-threshold swing (SS) — the gate voltage required to change the drain current by one order of magnitude — increases. As Qin Zhang, Wei Zhao, and Alan Seabaugh of Notre Dame explained in 2006, SS faces a theoretical minimum of 60 mV/decade at room temperature in conventional MO... » read more

The Ultimate Shift Left
By Brian Bailey - 09 Mar, 2017 - Comments: 0

Floorplanning is becoming much more difficult due to a combination of factors—increased complexity of the power delivery network, lengthening of clock trees, rising levels of communication, and greater connectedness of [getkc id="81" kc_name="SoC"]s coupled with highly constrained routing resources. The goal of floorplanning is to determine optimal placement of blocks on a die. But connect... » read more

The Return Of Time Sharing
By Ed Sperling - 16 Feb, 2017 - Comments: 0

As early as the 1960s, it wasn't uncommon to hear that transistors would be free. Those were pretty bold statements at the time, considering most computers in those days cost $1 million, required special rooms, and budding computer scientists usually had to sign up to use mainframe computers for one-hour time slots—often in the middle of the night or on weekends. Still, those predictions ... » read more

Test More Complex For Cars, IoT
By Ann Mutschler - 15 Feb, 2017 - Comments: 0

With increasing focus on safety-critical semiconductors—driven by ADAS, IoT, and security—functional safety concerns are going through the roof. Engineering teams are scrambling to determine how to conduct better in-field or online testing because test no longer can be an afterthought. This has been a common theme across the automotive ecosystem for the past few years, and as the automot... » read more

Fix Processes, Then Silos
By Ed Sperling - 09 Feb, 2017 - Comments: 0

Jack Welch, former CEO of GE, was a big proponent of what he called a "boundaryless corporation." It was a good sound bite, but it pales in comparison to former Intel CEO Andy Grove's philosophy of working out of a cubicle, just like the rest of his staff. While it's great to have corporate buy-in for breaking down silos, which are vertically integrated, the real problem for semiconductor c... » read more

What Can Be Cut From A Design?
By Ann Mutschler - 09 Feb, 2017 - Comments: 0

A long-standing approach of throwing everything into a chip increasingly is being replaced by a focus on what can be left out it. This shift is happening at every level, from the initial design to implementation. After years of trying to fill every square nanometer of real estate on a piece of silicon with memory and logic, doubling the number of [getkc id="26" kc_name="transistors"] from on... » read more

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