tag: low-power design

Efficient Gated Clock Design Approach for LFSR
By Technical Paper Link - 20 Dec, 2022 - Comments: 0

A technical paper titled "A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers" was published by researchers at Università degli Studi di Catania, Italy. Abstract "This paper presents an efficient solution to reduce the power consumption of the popular linear feedback shift register by exploiting the gated clock approach. The power reduction with respec... » read more

Taking Power Much More Seriously
By Brian Bailey - 10 Nov, 2022 - Comments: 0

An increasing number of electronic systems are becoming limited by thermal issues, and the only way to solve them is by elevating energy consumption to a primary design concern rather than a last-minute optimization technique. The optimization of any system involves a complex balance of static and dynamic techniques. The goal is to achieve maximum functionality and performance in the smalles... » read more

Balancing Power And Heat In Advanced Chip Designs
By Karen Heyman - 10 Nov, 2022 - Comments: 1

Power and heat use to be someone else's problem. That's no longer the case, and the issues are spreading as more designs migrate to more advanced process nodes and different types of advanced packaging. There are a number of reasons for this shift. To begin with, there are shrinking wire diameters, thinner dielectrics, and thinner substrates. The scaling of wires requires more energy to driv... » read more

A Power-First Approach
By Brian Bailey - 27 Oct, 2022 - Comments: 7

It is becoming evidently clear that heat will be the limiter for the future of semiconductors. Already, large percentages of a chip are dark at any time, because if everything operated at the same time the amount of heat generated would exceed the ability of the chip and package to dissipate that energy. If we now start to contemplate stacking dies, where the ability to extract heat remains con... » read more

Designing A Better Clock Network
By Ann Mutschler - 13 Oct, 2022 - Comments: 0

Laying the proper clock network architecture foundation makes all the difference for the best performance, power, and timing of a chip, particularly in advanced node SoCs packed with billions of transistors. Each transistor, which acts like a standard cell, needs a clock. An efficient clock network should ensure the switching transistors save power. In today’s advanced nodes, when a design... » read more

EVs Raise Energy, Power, And Thermal IC Design Challenges
By Ann Mutschler - 06 Oct, 2022 - Comments: 0

The transition to electric vehicles is putting pressure on power grids to produce more energy and on vehicles to use that energy much more efficiently, creating a gargantuan set of challenges that will affect every segment of the automotive world, the infrastructure that supports it, and the chips that are required to make all of this work. From a semiconductor standpoint, improvements in th... » read more

Rethinking Machine Learning For Power
By Brian Bailey - 13 Sep, 2022 - Comments: 0

The power consumed by machine learning is exploding, and while advances are being made in reducing the power consumed by them, model sizes and training sets are increasing even faster. Even with the introduction of fabrication technology advances, specialized architectures, and the application of optimization techniques, the trend is disturbing. Couple that with the explosion in edge devices... » read more

Cryogenic CMOS Becomes Cool
By Brian Bailey - 11 Aug, 2022 - Comments: 1

Cryogenic CMOS is a technology on the cusp, promising higher performance and lower power with no change in fabrication technology. The question now is whether it becomes viable and mainstream. Technologies often appear to be just on the horizon, not quite making it, but never too far out of sight. That's usually because some issue plagues it, and the incentive is not big enough to solve the ... » read more

Near-Threshold Computing Gets A Boost
By Brian Bailey - 25 Jul, 2022 - Comments: 0

Near-threshold computing has long been used for power-sensitive devices, but some surprising, unrelated advances are making it much easier to deploy. While near-threshold logic has been an essential technique for applications with the lowest power consumption, it always has been difficult to use. That is changing, and while it is unlikely to become a mainstream technique, it is certainly bec... » read more

Telecare Challenges: Secure, Reliable, Lower Power
By John Koon - 20 Jul, 2022 - Comments: 0

The adoption of telecare using a variety of connected digital devices is opening the door to much more rapid response to medical emergencies, as well as more consistent monitoring, but it also is adding new challenges involving connectivity, security, and power consumption. Telecare has been on the horizon for the better part of two decades, but it really began ramping with improvements in s... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy