Designing A Better Clock Network


Laying the proper clock network architecture foundation makes all the difference for the best performance, power, and timing of a chip, particularly in advanced node SoCs packed with billions of transistors. Each transistor, which acts like a standard cell, needs a clock. An efficient clock network should ensure the switching transistors save power. In today’s advanced nodes, when a design... » read more

EVs Raise Energy, Power, And Thermal IC Design Challenges


The transition to electric vehicles is putting pressure on power grids to produce more energy and on vehicles to use that energy much more efficiently, creating a gargantuan set of challenges that will affect every segment of the automotive world, the infrastructure that supports it, and the chips that are required to make all of this work. From a semiconductor standpoint, improvements in th... » read more

Rethinking Machine Learning For Power


The power consumed by machine learning is exploding, and while advances are being made in reducing the power consumed by them, model sizes and training sets are increasing even faster. Even with the introduction of fabrication technology advances, specialized architectures, and the application of optimization techniques, the trend is disturbing. Couple that with the explosion in edge devices... » read more

Cryogenic CMOS Becomes Cool


Cryogenic CMOS is a technology on the cusp, promising higher performance and lower power with no change in fabrication technology. The question now is whether it becomes viable and mainstream. Technologies often appear to be just on the horizon, not quite making it, but never too far out of sight. That's usually because some issue plagues it, and the incentive is not big enough to solve the ... » read more

Near-Threshold Computing Gets A Boost


Near-threshold computing has long been used for power-sensitive devices, but some surprising, unrelated advances are making it much easier to deploy. While near-threshold logic has been an essential technique for applications with the lowest power consumption, it always has been difficult to use. That is changing, and while it is unlikely to become a mainstream technique, it is certainly bec... » read more

Telecare Challenges: Secure, Reliable, Lower Power


The adoption of telecare using a variety of connected digital devices is opening the door to much more rapid response to medical emergencies, as well as more consistent monitoring, but it also is adding new challenges involving connectivity, security, and power consumption. Telecare has been on the horizon for the better part of two decades, but it really began ramping with improvements in s... » read more

Power Domain Implementation Challenges Escalate


The number power domains is rising as chip architects build finer-grained control into chips and systems, adding significantly to the complexity of the overall design effort. Different power domains are an essential ingredient in partitioning of different functions. This approach allows different chips in a package, and different blocks in an SoC, to continue running with just enough power t... » read more

Can Analog Make A Comeback?


We live in an analog world dominated by digital processing, but that could change. Domain specificity, and the desire for greater levels of optimization, may provide analog compute with some significant advantages — and the possibility of a comeback. For the last four decades, the advantages of digital scaling and flexibility have pushed the dividing line between analog and digital closer ... » read more

Transforming AI Models For Accelerator Chips


AI is all about speeding up the movement and processing of data. Ali Cheraghi, solution architect at Flex Logix, talks about why floating point data needs to be converted into integer point data, how that impacts power and performance, and how different approaches in quantization play into this formula. » read more

More Options, Less Dark Silicon


Chipmakers are beginning to re-examine how much dark silicon should be used in a heterogenous system, where it works best, and what alternatives are available — a direct result of a slowdown in Moore's Law scaling and the increasing disaggregation of SoCs. The concept of dark silicon has been around for a couple decades, but it really began taking off with the introduction of the Internet ... » read more

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