Node Skipping Reaches New Heights

By Ed Sperling - 15 Nov, 2012 - Comments: 0

By Mark LaPedus For years, silicon foundries have rolled out their respective leading-edge processes roughly on a two-year cadence. The long-standing goal has been to keep foundry customers on a competitive price, power and performance curve. But as leading-edge chipmakers move from the 28nm node and beyond, the predictable process progression is changing. And the phenomenon of “node skip... » read more

New Low-Power Memory Interface Ahead

By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Pallab Chatterjee The trend in consumer electronic devices is toward a multimedia-centric data flow, forcing changes in the memory interface needed to handle it. The increased compute resources needed for video signal processing, along with high-definition audio, used to be the exclusive domain of mainstream desktop computers and servers due to their access to memory and high data throug... » read more

Your Light Bulb Is Calling

By Ed Sperling - 25 Feb, 2010 - Comments: 0

By Pallab Chatterjee The mobility that is best associated with “smart phone” functionality is making its way into most other electronic systems. At ISSCC and even the Strategies in Light conference, systems and products were being shown featuring standard RF interfaces. The RF is being made available as standalone die for multi-die and 3D packaging, as well as in SoC IP blocks. The func... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Marvell

Node Skipping Reaches New Heights

New Low-Power Memory Interface Ahead

Your Light Bulb Is Calling