New Materials Are in High Demand

By Bryon Moyer - 19 Sep, 2024 - Comments: 0

Materials suppliers are responding to the intense pressures to improve power, performance, scaling, and cost issues, which follows a long timeline from synthesis to development and high volume manufacturing in fabs. The advances in machine learning help present a wide field of candidates, which engineers then narrow to potential use. When building standard logic semiconductor chips, the prim... » read more

Controlling Variability And Cost At 3nm And Beyond

By Ed Sperling - 22 May, 2019 - Comments: 1

Richard Gottscho, executive vice president and CTO of Lam Research, sat down with Semiconductor Engineering to talk about how to utilize more data from sensors in manufacturing equipment, the migration to new process nodes, and advancements in ALE and materials that could have a big impact on controlling costs. What follows are excerpts of that conversation. SE: As more sensors are added int... » read more

What Else Is In A Node?

By Sundeep Bajikar - 21 Jun, 2018 - Comments: 0

In part one of this blog, I reported on the 2018 Industry Strategy Symposium (ISS) where Dan Hutcheson of VLSI Research led a panel with representatives of Synopsys, NVIDIA, Intel, ASML and Applied Materials. The participants discussed how the industry is focused on simultaneously squeezing more capabilities from leading-nodes, inter-nodes and trailing-nodes to drive advances in computing. I to... » read more

The Growing Materials Challenge

By Katherine Derbyshire - 11 Jun, 2018 - Comments: 0

By Katherine Derbyshire & Ed Sperling Materials have emerged as a growing challenge across the semiconductor supply chain, as chips continue to scale, or as they are utilized in new devices such as sensors for AI or machine learning systems. Engineered materials are no longer optional at advanced nodes. They are now a requirement, and the amount of new material content in chips contin... » read more

What’s In A Node?

By Sundeep Bajikar - 30 May, 2018 - Comments: 0

In an environment where process nodes are no longer consistently delivering the level of improvements predicted by Moore’s Law, the industry will continue to develop “inter-nodes” as a way to deliver incremental improvements in lieu of “full-nodes.” A shift in market requirements, in part due to the rise of AI and IoT, is increasing emphasis on trailing-nodes. When it comes to leading... » read more

More Lithography/Mask Challenges (Part 3)

By Mark LaPedus - 16 May, 2018 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: materials engineering

New Materials Are in High Demand

Controlling Variability And Cost At 3nm And Beyond

What Else Is In A Node?

The Growing Materials Challenge

What’s In A Node?

More Lithography/Mask Challenges (Part 3)

Trending Articles

Hybrid Bonding Makes Strides Toward Manufacturability

Americas Chip Funding Energizes Industry

Advanced Packaging Driving New Collaboration Across Supply Chain

Chiplets Make Progress Using Interconnects As Glue

2D Semiconductors Make Progress, But So Does Silicon

Knowledge Centers
Entities, people and technologies explored