Next Steps For Panel-Level Packaging

By Mark LaPedus - 20 Dec, 2021 - Comments: 1

Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel-level processing. Fraunhofer IZM recently announced a new phase of its panel-level packaging consortium. What follows are excerpts of that discussion. SE: IC packaging isn’t new, but years a... » read more

Manufacturing Bits: Aug. 24

By Mark LaPedus - 24 Aug, 2021 - Comments: 0

Panel packaging consortium Fraunhofer Institute for Reliability and Microintegration IZM has provided an update on a consortium that is developing panel-level IC packaging technologies. Fraunhofer IZM is leading the consortium. The R&D organization and its partners, including Intel and others, have made progress in terms of equipment, processes and other technologies in the so-called Pa... » read more

Inside Panel-Level Fan-Out Technology

By Mark LaPedus - 11 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss panel-level fan-out packaging technology with Tanja Braun, deputy group manager at the Fraunhofer Institute for Reliability and Microintegration IZM, and Michael Töpper, business development manager at Fraunhofer IZM. Braun is responsible for the Panel Level Packaging Consortium at Fraunhofer IZM, as well as the group manager for assembly and encap... » read more

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Next Steps For Panel-Level Packaging

Manufacturing Bits: Aug. 24

Inside Panel-Level Fan-Out Technology

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