tag: memory

How Low Can You Go? Pushing The Limits Of Transistors
By Synopsys - 09 Nov, 2022 - Comments: 0

Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power). This highly competitive industry provides significant rewar... » read more

Which Foundry Is In The Lead? It Depends.
By Ed Sperling - 26 Oct, 2022 - Comments: 2

The multi-billion-dollar race for foundry leadership is becoming more convoluted and complex, making it difficult to determine which company is in the lead at any time because there are so many factors that need to be weighed. This largely is a reflection of changes in the customer base at the leading edge and the push toward domain-specific designs. In the past, companies like Apple, Google... » read more

Foundational Changes In Chip Architectures
By Brian Bailey - 13 Oct, 2022 - Comments: 5

We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

PLANAR: A Programmable Accelerator For Near-Memory Data Rearrangement
By Arm - 12 Oct, 2022 - Comments: 0

Many applications employ irregular and sparse memory accesses that cannot take advantage of existing cache hierarchies in high performance processors. To solve this problem, Data Layout Transformation (DLT) techniques rearrange sparse data into a dense representation, improving locality and cache utilization. However, prior proposals in this space fail to provide a design that (i) scales with m... » read more

Digitizing Memory Design And Verification To Accelerate Development Turnaround Time
By Anand Thiruvengadam - 10 Oct, 2022 - Comments: 0

By Anand Thiruvengadam, Farzin Rasteh, Preeti Jain, and Jim Schultz Some digital design and verification engineers imagine that their colleagues working on analog/mixed-signal (AMS) chips are jealous. After all, the digital development flow has enjoyed the benefits of increased automation and higher levels of abstraction for many years. Hand-instantiated devices and manual interconnection we... » read more

How Memory Design Optimizes System Performance
By John Koon - 21 Sep, 2022 - Comments: 0

Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on the memory side. While the underlying technology still looks very familiar, the real shift is in the way those memories are connected to processing elements and various components within a syste... » read more

DDR Memory Test Challenges From DDR3 to DDR5
By Keysight - 21 Sep, 2022 - Comments: 0

Cloud, networking, enterprise, high-performance computing, big data, and artificial intelligence are propelling the development of double data rate (DDR) memory chip technology. Demand for lower power requirements, higher density for more memory storage, and faster transfer speeds are constant. Servers drive the demand for next-generation DDR. Consumers benefit when existing and legacy generati... » read more

3D NAND Virtual Process Troubleshooting And Investigation
By Brett Lowe - 18 Aug, 2022 - Comments: 0

Modern semiconductor processes are extremely complicated and involve thousands of interacting individual process steps. During the development of these process steps, roadblocks and barriers are often encountered in the form of unanticipated negative interactions between upstream and downstream process modules. These barriers can create a long delay in the development cycle and increase costs. ... » read more

Memory Design Shift Left To Achieve Faster Development Turnaround Time
By Anand Thiruvengadam - 15 Aug, 2022 - Comments: 0

As noted in a recent blog post, demand for more memory is a common theme for many semiconductor-driven products. Artificial intelligence (AI) and machine learning (ML) algorithms rely on fast, plentiful memory for real-time performance, and storage at all levels is key to data-intensive applications. General-purpose memory devices are giving way to customized chips for applications such as AI, ... » read more

Data Integrity For JEDEC DRAM Memories
By Shyam Sharma - 19 Jul, 2022 - Comments: 0

With the DRAM fabrication advancing from 1x to 1y to 1z and further to 1a, 1b, and 1c nodes along with the DRAM device speeds going up to 8533 for LPDDR5 and 8800 for DDR5, data integrity is becoming a really important issue that the OEMs and other users have to consider as part of the system that relies on the correctness of data being stored in the DRAMs for system to work as designed. I... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy