Startup Funding: November 2020


Numerous chipmakers pulled in funding in November 2020, with investors putting money into interconnects, memories, AI hardware, and quantum computing. Launching from stealth was a startup aiming to combine AI and 5G. Autonomous delivery did well, too, with one company raising a massive $500M. This month, we take a look at 28 companies that raised a collective $1.1B. Semi & design Connec... » read more

Impact Of Instruction Memory On Processor PPA


The area of any part of a design contributes both to the silicon cost and to the power consumption. A simplistic following of the “A” in a processor IP vendor’s PPA numbers can be misleading. A processor is never in isolation but is part of a subsystem additionally including instruction memory, data memory, and peripherals. In most cases, instruction memory will be dominant and the proc... » read more

Upturn Seen For Silicon Wafer Market


After a downturn in 2019, the silicon wafer market is expected to rebound in 2020. 2021 looks even better for silicon wafers. Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. The silicon wafer ma... » read more

Dealing With Sub-Threshold Variation


Chipmakers are pushing into sub-threshold operation in an effort to prolong battery life and reduce energy costs, adding a whole new set of challenges for design teams. While process and environmental variation long have been concerns for advanced silicon process nodes, most designs operate in the standard “super-threshold” regime. Sub-threshold designs, in contrast, have unique variatio... » read more

Difficult Memory Choices In AI Systems


The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

ResNet-50 Does Not Predict Inference Throughput For MegaPixel Neural Network Models


Customers are considering applications for AI inference and want to evaluate multiple inference accelerators. As we discussed last month, TOPS do NOT correlate with inference throughput and you should use real neural network models to benchmark accelerators. So is ResNet-50 a good benchmark for evaluating relative performance of inference accelerators? If your application is going to p... » read more

GDDR6 Memory For Life On The Edge


With the torrid growth in data traffic, it is unsurprising that the number of hyperscale data centers has grown apace. According to analysts at the Synergy Research Group, in July of this year there were 541 hyperscale data centers worldwide. That represents a doubling in the number since 2015. Even more striking, there are an additional 176 in the pipeline, so the breakneck growth in hyperscal... » read more

Machine Learning Enabled High-Sigma Verification Of Memory Designs


Emerging applications and the big data explosion have made memory IPs ubiquitous in modern-day electronics. Specifically, the demand for memories with low-die area, low voltage, high capacity, and high performance is rising for use by data center and cloud computing servers. This is essential to serve the exponentially growing connectivity boom and the latest emerging 5G based systems, includin... » read more

Slower Metal Bogs Down SoC Performance


Metal interconnect delays are rising, offsetting some of the gains from faster transistors at each successive process node. Older architectures were born in a time when compute time was the limiter. But with interconnects increasingly viewed as the limiter on advanced nodes, there’s an opportunity to rethink how we build systems-on-chips (SoCs). ”Interconnect delay is a fundamental tr... » read more

Cerfe Labs: Spin-On Memory


Arm has spun off one of its more intriguing semiconductor research projects, a new non-volatile memory type called correlated electron materials RAM (CeRAM) that holds the potential to substantially reduce the cost of memory in everything from edge devices to high-performance computing. Headed by two former Arm Research insiders — Eric Hennenhoefer, who will serve as CEO and Greg Yeric, wh... » read more

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