The Long Pause


Carmakers are leaping over each other to roll out cars that meet SAE Level 3 requirements, whereby under some conditions drivers can let go of the steering wheel. Getting to Level 5 will take a lot longer, and there is some debate about where and even whether Level 4 will ever happen (see Fig. 1). Fig. 1: Levels of autonomy. Source: Auto Alliance There are two big gaps that need to be a... » read more

What’s In A Node?


In an environment where process nodes are no longer consistently delivering the level of improvements predicted by Moore’s Law, the industry will continue to develop “inter-nodes” as a way to deliver incremental improvements in lieu of “full-nodes.” A shift in market requirements, in part due to the rise of AI and IoT, is increasing emphasis on trailing-nodes. When it comes to leading... » read more

Power/Performance Bits: May 22


Sensing without battery power Engineers at the National University of Singapore developed an IoT-focused sensor chip that can continue operating when its battery runs out of energy. The chip, BATLESS, uses a power management technique that allows it to self-start and continue to function under dim light without any battery assistance. The chip can operate in two different modes: minimum-ene... » read more

Deep Learning Neural Networks Drive Demands On Memory Bandwidth


A deep neural network (DNN) is a system that is designed similar to our current understanding of biological neural networks in the brain. DNNs are finding use in many applications, advancing at a fast pace, pushing the limits of existing silicon, and impacting the design of new computing architectures. Figure 1 shows a very basic form of neural network that has several nodes in each layer that ... » read more

Tech Talk: HBM vs. GDDR6


Frank Ferro, senior director of product management at Rambus, talks about memory bottlenecks and why both GDDR6 and high-bandwidth memory are gaining steam and for which markets. https://youtu.be/CPqdZZooS2g     Related Video GDDR6 – HBM2 Tradeoffs (2019) What type of DRAM works best where. » read more

Blog Review: Apr. 18


Cadence's Meera Collier provides an overview of five emerging technologies that could drive the semiconductor industry in the future, from carbon nanotubes to quantum computing. Mentor's Colin Walls reminds embedded software developers of a few common sense tips, including better readability with braces in C/C++ and monitoring stack overflow. Synopsys' Tim Mackey rounds up the last few we... » read more

Architecture, Materials And Software


AI, machine learning and autonomous vehicles will require massive improvements in performance, at the same power consumption level (or better), over today's chips. But it's obvious that the usual approach of shrinking features to improve power/performance isn't going to be sufficient. Scaling will certainly help, particularly on the logic side. More transistors are needed to process a huge i... » read more

High-Performance Memory Challenges


Designing memories for high-performance applications is becoming far more complex at 7/5nm. There are more factors to consider, more bottlenecks to contend with, and more tradeoffs required to solve them. One of the biggest challenges is the sheer volume of data that needs to be processed for AI, machine learning or deep learning, or even in classic data center server racks. “The design... » read more

Ultra-Low Power Memory IPs Using Mentor coolSRAM-6T Technology


The use of embedded static random access memory (eSRAM) in complex ICs has significantly increased in the past three decades. This trend will continue with the growth of ICs designed for rapidly expanding markets such as automotive, virtual reality (VR) / augmented reality (AR), implantable medical devices, gaming, sensor hub, medical devices, wearable computing, data center, and artificial int... » read more

How To Choose The Right Memory


When it comes to designing memory, there is no such thing as one size fits all. And given the long list of memory types and usage scenarios, system architects must be absolutely clear on the system requirements for their application. A first decision is whether or not to put the memory on the logic die as part of the SoC, or keep it as off-chip memory. "The tradeoff between latency and th... » read more

← Older posts Newer posts →