Power/Performance Bits: April 19


Ferroelectric non-volatile memory Scientists from the Moscow Institute of Physics and Technology (MIPT), the University of Nebraska, and the University of Lausanne in Switzerland succeeded in growing ultra-thin (2.5-nanometer) ferroelectric films based on hafnium oxide that could potentially be used to develop non-volatile memory elements called ferroelectric tunnel junctions. The film was g... » read more

It’s All About DRAM


For decades, the starting point for compute architectures was the processor. In the future, it likely will be the DRAM architecture. Dynamic random access memory always has played a big role in computing. Since IBM's Robert Dennard invented DRAM back in 1966, it has become the gold standard for off-chip memory. It's fast, cheap, reliable, and at least until about 20nm, it has scaled quite n... » read more

Using Multi-Channel Connections for Optimized LPDDR4 Power & Performance


LPDDR4, the latest double data rate synchronous DRAM for mobile applications, includes a number of features that enable SoC design teams to reduce power consumption of discrete DRAM in mobile devices. Desktop devices like PCs and servers commonly utilize DDR devices mounted on dual inline memory modules (DIMM) hosted on 64-bit wide buses. This board-level solution allows field-upgradeable DRAM ... » read more

One-Time-Programmable Memories For IoT Security


Security in the IoT space is an issue of major concern. Hackers are attacking IoT devices across all layers of the infrastructure, from the application layer down to protocol, to the physical and deep into the IoT devices. I intend to focus on vulnerability prevention for IoT devices at the lowest level: memory structure and key storage. I conclude with indicating highly important features a... » read more

Many Paths To Hafnium Oxide


Equipment and materials suppliers often talk about the fragmentation of integrated circuit processing. While the number of manufacturers has gone down, the diversity of the underlying semiconductor market has increased. Low-power processors for mobile devices, non-volatile memory for solid state disks, and dedicated graphics processors all have different requirements from the traditional ind... » read more

Prototype Like A Pro


FPGA-based prototyping has been a key prototyping technique for many years. The steady increase in software content and thus the need to verify and validate the SoC in context of the software has resulted in an equally steady increase in its usage. FPGA-based prototyping or physical prototyping, as it is also called, offers a great way to develop software, verify the hardware in context of that... » read more

Power/Performance Bits: March 22


Superconducting memory A group of scientists from the Moscow Institute of Physics and Technology and the Moscow State University developed a fundamentally new type of memory cell based on superconductors, which they believe will be able to work hundreds of times faster than memory devices commonly used today. The basic memory cells are based on quantum effects in "sandwiches" of supercond... » read more

Ready For Nanoimprint?


Nanoimprint has been discussed, debated, and hyped since the term was first introduced in 1996. Now, a full 20 years later, it is being taken much more seriously in light of increasing photomask costs and delays in bringing alternatives to market. Nanoimprint lithography is something like a room-temperature UV cure embossing process. The structures are patterned onto a template or mold using... » read more

3D NAND Flash Processing


Coventor’s powerful SEMulator3D semiconductor process modeling platform offers a wide range of technology development capabilities for the development of cutting edge 3D NAND Flash Technology. 3D NAND promises high memory cell density with reduced data corruption, but also brings processing challenges. The structural complexity and inherent 3D nature of devices using 3D NAND require a predict... » read more

New Memory Approaches And Issues


New memory types and approaches are being developed and tested as DRAM and Moore's Law both run out of steam, adding greatly to the confusion of what comes next and how that will affect chip designs. What fits where in the memory hierarchy is becoming less clear as the semiconductor industry grapples with these changes. New architectures, such as [getkc id="202" kc_name="fan-outs"] and [getk... » read more

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