tag: Mentor Graphics

Experts At The Table: The Future Of Verification
By Ed Sperling - 11 Nov, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the future of verification with Janick Bergeron, Synopsys fellow; Harry Foster, chief verification scientist at Mentor Graphics; Frank Schirrmeister, group director of product marketing for the Cadence System Development Suite; Prakash Narain, president and CEO of Real Intent; and Yunshan Zhu, vice president of new technologies at Atrenta. What foll... » read more

ARM Cortex-A53, UPF & FD-SOI
By Barry Pangrle - 07 Nov, 2013 - Comments: 0

The IEEE Standards Association Symposium on Electronic Design Automation (EDA) Interoperability was held on Oct. 24. I found the first session, Interoperability Challenges: Power Management in Silicon, with presentations by Erich Marschner of Mentor Graphics and Stuart Riches and Adnan Khan (both from ARM) to be particularly interesting. Earlier this year, the IEEE announced a new version of UP... » read more

Analog IP Migration Using Design Knowledge Extraction
By Various Writers - 07 Nov, 2013 - Comments: 0

Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. It relies on design knowledge extraction, which renders it very fast compared to full optimization approaches and allows handling of much larger circuits. This technique studies the original design and extracts its major features (basic devices & blocks features, device matching, parasitics,... » read more

Paving The Way To 16/14nm
By Ed Sperling - 07 Nov, 2013 - Comments: 0

The move to the next stop on the Moore’s Law road map isn’t getting any less expensive or easier, but it is becoming more predictable. Tools and programs are being expanded to address physical effects such as electrostatic discharge (ESD), electromigration and thermal effects from increased current density. Any or all of these three checklist items can affect the reliability of a chip. A... » read more

The Problem With EDA Standards
By Brian Bailey - 07 Nov, 2013 - Comments: 0

In the EDA industry, does standard mean the same as it does in most industries? The Free Dictionary defines it as: Something, such as a practice or a product, that is widely recognized or employed, especially because of its excellence. In the EDA industry, a standards body is the place where EDA companies and customers come together to try and bring about convergence, often in a new or emerging... » read more

Huge Challenges With Billions Of Things
By Ed Sperling - 07 Nov, 2013 - Comments: 0

Communication is poised in the next couple of years to cross a line between humans and things—things talking directly to other things as well as to people—setting in motion a series of technological, social and legal issues that will take years or decades to resolve. On one hand, this is made possible by leaps in processing performance and power management in mobile devices. In his keyno... » read more

Blog Review: Nov. 6
By Ed Sperling - 06 Nov, 2013 - Comments: 0

Mentor’s J VanDomelon provides some insights into a program to improve the working relationship between humans and robots, aka the Minotaur project. This is like sensitivity training for advanced weaponry. Synopsys’ Karen Bartleson rolls out part two of her discussion with Mike Malone about the phenomenon known as Silicon Valley. As with Moore’s Law, reports about impending doom, irrel... » read more

Experts At The Table: The Future Of Verification
By Ed Sperling - 04 Nov, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the future of verification with Janick Bergeron, Synopsys fellow; Harry Foster, chief verification scientist at Mentor Graphics; Frank Schirrmeister, group director of product marketing for the Cadence System Development Suite; Prakash Narain, president and CEO of Real Intent; and Yunshan Zhu, vice president of new technologies at Atrenta. What foll... » read more

The Week In Review: System-Level Design
By Ed Sperling - 01 Nov, 2013 - Comments: 0

Qualcomm bought some of Arteris’ IP assets and the bulk of its French design team, but Arteris remains a viable company with a NoC product, customers, and an infrastructure. ARM released a study, in conjunction with the Economist Intelligence Unit, that shows 75% of global business leaders are actively researching opportunities on the Internet of Things. The report says the five barriers f... » read more

Experts At The Table: Debug
By Ed Sperling - 31 Oct, 2013 - Comments: 0

Semiconductor Engineering sat down with Galen Blake, senior verification engineer at Altera; Warren Stapleton, senior fellow at Advanced Micro Devices; Stephen Bailey, director of solutions marketing at Mentor Graphics; Michael Sanie, senior director of verification marketing at Synopsys. What follows are excerpts of that conversation. SE: There are separate areas being created in devices, s... » read more

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