tag: Mentor

Auto Chip Aging Accelerates In Hot Climates
By Ed Sperling - 09 Dec, 2024 - Comments: 1

Automotive chips are aging significantly faster than expected in hot climates with sustained high temperatures, raising concerns about the reliability of electrified vehicles over time and whether advanced-node chips are the right choice for safety-critical applications. Many of the most advanced electronics used in vehicles today are ASIL D-compliant, expected to function up to 125° C. But... » read more

Chip Industry Week In Review
By The SE Staff - 06 Dec, 2024 - Comments: 0

Global chips sales hit a record $56.9 billion in October, a 22% increase versus October 2023, according to the Semiconductor Industry Association. Also, global semiconductor equipment billings reached $30.38 billion in Q3 2024, a 19% YoY increase and 13% growth QoQ, SEMI reported. TSMC commenced equipment installation for its 2nm fab in Kaohsiung, Taiwan, six months ahead of schedule. The 2n... » read more

Radar, AI, And Increasing Autonomy Are Redefining Auto IC Designs
By Ann Mutschler - 05 Dec, 2024 - Comments: 0

Increasing levels of autonomy in vehicles are fundamentally changing which technologies are chosen, how they are used and interact with each other, and how they will evolve throughout a vehicle's lifetime. Entire vehicle architectures are being reshaped continuously to enable the application of AI across a broad swath of functions, prompting increasing investment into technologies that were ... » read more

Where Cryptography Is Headed
By Adam Kovac - 05 Dec, 2024 - Comments: 0

Reports began surfacing in October that Chinese researchers used a quantum computer to crack military-grade AES 256-bit encryption. Those reports turned out to be wrong, but that did little to dampen concerns about what would happen if it was true. The looming threat of quantum computers breaking today's encryption, and the stockpiling of encrypted data in preparation for a time when it can ... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2024 - Comments: 0

Siemens' Reetika explains how creating and verifying a complete reset tree structure allows designers to trace the flow of reset signals across the design and ensure that every sequential element is tagged correctly within its respective reset domain. Cadence's Durlov Khan suggests DDR5 DIMM Memory Models and Discrete Component Models as part of a flexible approach to validating specific com... » read more

Chip Companies Play Bigger Role In Shaping University Curricula
By Liz Allan - 02 Dec, 2024 - Comments: 0

A shortage of senior engineers with the necessary skills and experience is forcing companies to hire and train fresh graduates, a more time-consuming process but one that allows them to rise through the ranks using the companies' preferred technology and systems. Universities and companies share the goal of helping a graduate become productive in the workplace as quickly as possible, and the... » read more

Chip Industry Week In Review
By The SE Staff - 29 Nov, 2024 - Comments: 0

Intel CEO Pat Gelsinger retired on Dec. 1, according to the company. He will be replaced by two interim co-CEOs, David Zinsner, who also continues to serve as CFO  and Michelle Johnston Holthaus, who has been named CEO of Intel Products. In addition, Frank Yeary was named interim executive chairman. Intel has been under pressure investors as non-traditional rivals, including Arm and NVIDIA, co... » read more

Aging, Complexity, And AI In Analog Design
By Ed Sperling - 27 Nov, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss abstraction in analog vs. digital, how analog circuits age, the growing role of AI, and why there is so much margin in analog designs, with Mo Faisal, president and CEO of Movellus; Hany Elhak, executive director of product management at Synopsys; Cedric Pujol, product manager at Keysight; and Pradeep Thiagarajan, principal pro... » read more

How To Speed Up LVS Verification
By Wael elManhawy - 26 Nov, 2024 - Comments: 0

Layout versus schematic (LVS) comparison is a crucial step in integrated circuit (IC) design verification, ensuring that the physical layout of the circuit matches its schematic representation. The primary goal of LVS is to verify the correctness and functionality of the design. Traditionally, LVS comparison is performed during signoff verification, where dedicated tools compare layout and sche... » read more

Top-Down Vs. Bottom-Up Chiplet Design
By Ann Mutschler - 26 Nov, 2024 - Comments: 0

Chiplets are gaining widespread attention across the semiconductor industry, but for this approach to really take off commercially it will require more standards, better modeling technologies and methodologies, and a hefty amount of investment and experimentation. The case for chiplets is well understood. They can speed up time to market with consistent results, at whatever process node work... » read more

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