Chip Industry Week In Review


By Susan Rambo, Gregory Haley, Jesse Allen, and Liz Allan President Biden issued an executive order on the “Safe, Secure, and Trustworthy Development and Use of Artificial Intelligence.” It says entities need to report large-scale computing clusters and the total computing power available, including “any model that was trained using a quantity of computing power greater than 1,026 inte... » read more

Bug, Flaw, Or Cyberattack?


The lines between counterfeiting, security, and design flaws are becoming increasingly difficult to determine in advanced packages and process nodes, where the number of possible causes of unusual behavior grow exponentially with the complexity of a device. Strange behavior may be due to a counterfeit part, including one that contains a trojan. Or it may be the result of a cyberattack. It al... » read more

Designing Automotive ICs For Cybersecurity


The day has already arrived when we need to be concerned about the cybersecurity of our cars. An average modern car includes about 1400 ICs and many of them are used in sophisticated applications, like autonomous driving and vehicle-to-everything (V2X) communication. The security of road vehicles is an important issue to automakers and OEMs but is rooted in the IC devices that power the vehicle... » read more

Automotive Safety Island


The promise of autonomous vehicles is driving profound changes in the design and testing of automotive semiconductor parts. Automotive ICs, once deployed for simple functions like controlling windows, are now performing complex functions related to advanced driver-assist systems (ADAS) and autonomous driving applications. The processing power required results in very large and complex ICs that ... » read more

Blog Review: November 1


Cadence’s Rich Chang finds that although UVM has being used for testbench creation for more than a decade, it is still challenging to debug problems that are inside of UVM testbench. Siemens’ Keith Felton suggests that early analysis in complex advanced packaging flows can enable designers to spot potential issues early to avoid built-in constructs that cause design failures and require ... » read more

What Will That Chip Cost?


In the past, analysts, consultants, and many other experts attempted to estimate the cost of a new chip implemented in the latest process technology. They concluded that by the 3nm node, only a few companies would be able to afford them — and by the time they got into the angstrom range, probably nobody would. Much has changed over the past few process nodes. Increasing numbers of startups... » read more

Chip Industry Week In Review


By Susan Rambo, Karen Heyman, and Liz Allan The Biden-Harris administration designated 31 Tech Hubs across the U.S. this week, focused on industries including autonomous systems, quantum computing, biotechnology, precision medicine, clean energy advancement, and semiconductor manufacturing. The Department of Commerce (DOC) also launched its second Tech Hubs Notice of Funding Opportunity. ... » read more

Anatomy Of A System Simulation


The semiconductor industry has greatly simplified analysis by consolidating around a small number of models and abstractions, but that capability is breaking down both at the implementation level and at the system level. Today, the biggest pressure is coming from the systems industry, where the electronic content is a small fraction of what must be integrated together. Systems companies tend... » read more

Rethinking Design, Workflow For 3D


In the 3D world, where NAND has hundreds of layers and packages come in intricate stacks, fresh graduates and veteran engineers alike are being confronted with design challenges that require a rethinking of both classic designs and traditional workflows, but without breaking the laws of physics. “There are pockets of things that have been on 3D for quite some time,” said Kenneth Larson, ... » read more

Making Connections In 3D Heterogeneous Integration


Activity around 3D heterogeneous integration (3DHI) is heating up, driven by growing support from governments, the need to add more features and compute elements into systems, and a widespread recognition that there are better paths forward than packing everything into a single SoC at the same process node. The leading edge of chip design has changed dramatically over the last few years. Int... » read more

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