MIPI Drives Performance For Next-Generation Displays


MIPI Alliance technology has helped enable the dramatic growth of the mobile phone market. The function and capabilities of MIPI interface solutions have grown dramatically as well. MIPI DSI-2 has become the leading display interface across a growing range of products including smartphones, AR/VR, IoT appliances, and ADAS/autonomous vehicles. As the application space has expanded, so too have t... » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Innovation In C-PHY


The addition of cameras and larger displays in mobile phones intensified the need to move data at higher speeds with fewer wires and low power using asymmetrical interfaces. The MIPI Alliance was formed in 2003 to standardize these interfaces and enable interoperability. The use of MIPI specifications has spread from mobile applications with extremely high-volume requirements to many other appl... » read more

MIPI Drives Performance for Next-Generation Displays


In late 2000, Nokia announced its iconic 3310 handset which featured an 84×48-pixel pure monochrome display. Seven years later, Apple unveiled its first iPhone with a 90mm (3.5”) screen and 320×480-pixel resolution (at 163 ppi). Cameras and high-quality displays quickly became the de-facto standard for smartphones by the mid-2000s. However, proprietary interface solutions for connecting cam... » read more

Battle Brewing Over Automotive Display Protocols


Displays are multiplying in new and future automobiles. That means a lot more display data moving around the vehicle and traveling some distance between sensor and processor. While existing protocols can handle some of the new duties, new protocols also are being developed specifically for this application. “Automotive displays are proliferating, increasing in numbers and in pixel densi... » read more

Many Chiplet Challenges Ahead


Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Energy Harvesting Shows New Signs of Life


Energy harvesting is seeing renewed activity in select markets, years after some high-profile attempts to build this into consumer electronics stalled out. Costs, manufacturing challenges, and market resistance kept this technology from moving forward, more than a decade after it was being touted as the best way forward for consumer electronics and devices that were hard to access. While sol... » read more

More Data Drives Focus On IC Energy Efficiency


Computing workloads are becoming increasingly interdependent, raising the complexity level for chip architects as they work out exactly where that computing should be done and how to optimize it for shrinking energy margins. At a fundamental level, there is now more data to compute and more urgency in getting results. This situation has forced a rethinking of how much data should be moved, w... » read more

MIPI D-PHY RX⁺: An Optimized Test Configuration


With the proliferation of the mobile platform, the accelerating adoption of MIPI beyond the traditional mobile platform and into safety related applications, testability of MIPI® PHY is becoming a key requirement. While the D-PHY is the MIPI PHY with the widest adoption in the industry today, the RX+ is a D-PHY receiver configuration optimized for full-speed production testing. The presentatio... » read more

Week In Review: Design, Low Power


Tools & IP Codasip unveiled three commercially licensed add-ons to the Western Digital SweRV Core EH1, aiming to allow it to be designed into a wider range of applications. The SweRV Core EH1 is a 32-bit, dual-issue, RISC-V ISA core with a 9-stage pipeline, open-sourced through CHIPS Alliance. The add-ons offer a floating-point unit (FPU) that supports the RISC-V single precision [F] and d... » read more

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