tag: monolithic integration

Fine-Grained Functional Partitioning For Low Level SRAM Cache in 3D-IC designs (imec)
By Technical Paper Link - 27 Sep, 2024 - Comments: 0

A new technical paper titled "Towards Fine-grained Partitioning of Low-level SRAM Caches for Emerging 3D-IC Designs" was published by researchers at imec. "We propose a partitioning of low-level (faster access) caches in 3D using an Array Under CMOS (AuC) technology paradigm. Our study focuses on partitioning and optimization of SRAM bit-cells and peripheral circuits, enabling heterogeneous ... » read more

Wafer-Scale CMOS-Integrated GFET Arrays With High Yield And Uniformity Designed For Biosensing Applications
By Technical Paper Link - 06 Sep, 2023 - Comments: 0

A technical paper titled “Wafer-Scale Graphene Field-Effect Transistor Biosensor Arrays with Monolithic CMOS Readout” was published by researchers at VTT Technical Research Centre of Finland and Graphenea Semiconductor SLU. Abstract: "The reliability of analysis is becoming increasingly important as point-of-care diagnostics are transitioning from single-analyte detection toward multiplex... » read more

III–V Laser Grown on a Patterned Si Photonics Platform With Light Coupling Into Passive SiN Waveguides
By Technical Paper Link - 28 Jul, 2023 - Comments: 0

A technical paper titled “Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides” was published by researchers at University of Montpellier, Tyndall National Institute, Munster Technological University and Polytechnic University of Bari. Abstract: "Silicon (Si) photonics has recently... » read more

Crystal Phase Control during Epitaxial Hybridization of III-V Semiconductors with Silicon
By Technical Paper Link - 21 Dec, 2021 - Comments: 0

Abstract: "The formation and propagation of anti-phase boundaries (APBs) in the epitaxial growth of III-V semiconductors on Silicon is still the subject of great debate, despite the impressive number of studies focusing on this topic in the last past decades. The control of the layer phase is of major importance for the future realization of photonic integrated circuits that include efficien... » read more

The Chip Industry’s Next-Gen Roadmap
By Mark LaPedus - 21 Jan, 2021 - Comments: 1

Todd Younkin, the new president and chief executive of the Semiconductor Research Corp. (SRC), sat down with Semiconductor Engineering to talk about engineering careers, R&D trends and what’s ahead for chip technologies over the next decade. What follows are excerpts of that conversation. SE: As a U.S.-based chip consortium, what is SRC's charter? Younkin: The Semiconductor Research... » read more

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