tag: Moore’s Law

Ecosystem Vs. Ecosystem
By Ed Sperling - 12 Nov, 2015 - Comments: 0

The massive consolidation that has been underway over the past couple years is about to slow down. Interest rates are expected to increase in the very near future—the Fed has been dropping hints about this for months—ending the era of cheap capital. The cost of borrowing already is creeping up in anticipation of this, and it's happening globally because money lending is a global industry. ... » read more

Overcoming The Design Bottleneck
By Brian Bailey - 12 Nov, 2015 - Comments: 0

SoCs control most advanced electronics these days and functionality, quality, power and security are a combination of both hardware and software. All throughout the development of today's complex systems, the memory hierarchy has remained the same—preserving the notion of a continuous computing paradigm. Today, that decision is leading to performance and power issues. There are several rea... » read more

Upcoming Hurdles For The Semiconductor Industry
By Ann Mutschler - 12 Nov, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael Buehle... » read more

Tech Talk: 14nm And Stacked Die
By Ed Sperling - 11 Nov, 2015 - Comments: 0

Aashish Malhotra, marketing director for the ASIC Business Unit at GlobalFoundries, talks about 14nm process technology, the IP ecosystem, and why that technology node will be used as a platform for 2.5D and 3D stacked die across a wide range of markets including the Internet of Everything. [youtube vid=ukTRuedB7ZU] » read more

The Great IoE Race Begins
By Ed Sperling - 05 Nov, 2015 - Comments: 0

Nobody knows how many tens of billions of semiconductors will be used in the IoE, but it's a sure bet it won't be a few chips replicated billions of times. Most IoE devices will need to be customized for specific applications. Many will need to be highly reliable for many years. And all of them will need to be secure and power-efficient. Yet they also will need to connect to heterogeneous ne... » read more

More Choices, Less Certainty
By Ed Sperling - 04 Nov, 2015 - Comments: 3

The increasing cost of feature scaling is splintering the chip market, injecting uncertainty into a global supply chain that has been continually fine-tuned for decades. Those with deep enough resources and a clear need for density will likely follow Moore's Law, at least until 7nm. What comes after that will depend on a variety of factors ranging from available lithography—EUV, multi-bea... » read more

Increasing Challenges At Advanced Nodes
By Ed Sperling - 22 Oct, 2015 - Comments: 1

Gary Patton, chief technology officer at GlobalFoundries, sat down with Semiconductor Engineering to talk about new materials, stacked die, how far FD-SOI can be extended, and new directions for interconnects and transistors. What follows are excerpts of that conversation. SE: Where do you see problems at future nodes? Patton: At the device level, we have to be able to pattern these thing... » read more

Design Techniques Are Helping To Keep Moore’s Law Alive Longer
By Imec - 22 Oct, 2015 - Comments: 0

By Francky Catthoor Moore's Law means that electronic products can constantly be produced more cheaply, faster and more economically. Down to 45nm, this was due mainly to the technology that made it possible to reduce the size of transistors. Now things are becoming more difficult. But even if we are not able to achieve these gains through the further scaling of transistors as the result ... » read more

Abstraction: Necessary But Evil
By Brian Bailey - 14 Oct, 2015 - Comments: 1

Abstraction allows aspects of a design to be described in an executable form much earlier in the flow. But some abstractions are breaking down, and an increasing amount of lower-level information has to be brought upstream in order to provide estimates that are close enough to reality so informed decisions can be made. The value of abstractions in design cannot be overstated. High levels of ... » read more

Executive Insight: Lip-Bu Tan
By Ed Sperling - 01 Oct, 2015 - Comments: 1

Lip-Bu Tan, president and CEO of Cadence, sat down with Semiconductor Engineering to talk about consolidation, Moore's Law, and where the opportunities are in the IoT and automotive markets. What follows are excerpts of that conversation. SE: What are the big concerns for the semiconductor industry in general, and EDA in particular? Tan: Top on my list is all the consolidation that's goin... » read more

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