Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan. Cadence introduced an AI-based thermal stress and analysis platform aimed at 2.5D and 3D-ICs, and cooling for PCBs and electronic assemblies. The company also debuted a HW/SW accelerated digital twin solution for multi-physics system design and analysis, combining GPU-resident computational fluid dynamics (CFD) solvers with dedicated GPU hardwar... » read more

Chip Industry Week In Review


By Susan Rambo, Jesse Allen, and Liz Allan The U.S. government will provide about $162 million in federal incentives, under the CHIPS and Science Act, to help Microchip onshore its semiconductor supply chain. The move is aimed at securing a reliable domestic supply of MCUs and mature-node chips. “Today’s announcement will help propel semiconductor manufacturing projects in Colorado and O... » read more

Chip Industry Technical Paper Roundup: Dec 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=176 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Synopsys acquired Imperas, pushing further into the RISC-V world with Imperas' virtual platform technology for verifying and emulating processors. Synopsys has been building up its RISC-V portfolio, starting with ARC-V processor IP and a full suite of tools introduced last month. The first high-NA EUV R&D center in the U.S. will be built at... » read more

Hardware-Based Methodology To Protect AI Accelerators


A technical paper titled “A Unified Hardware-based Threat Detector for AI Accelerators” was published by researchers at Nanyang Technological University and Tsinghua University. Abstract: "The proliferation of AI technology gives rise to a variety of security threats, which significantly compromise the confidentiality and integrity of AI models and applications. Existing software-based so... » read more

More Efficient Side-Channel Analysis By Applying Two Deep Feature Loss Functions


A technical paper titled “Beyond the Last Layer: Deep Feature Loss Functions in Side-channel Analysis” was published by researchers at Nanyang Technological University, Radboud University, and Delft University of Technology. Abstract: "This paper provides a novel perspective on improving the efficiency of side-channel analysis by applying two deep feature loss functions: Soft Nearest Neig... » read more

Direct Chemisorption-Assisted Nanotransfer Printing with Wafer-Scale Uniformity and Controllability


New academic paper from Nanyang Technological University, Korea Institute of Machinery & Materials, and Southwest Jiaotong University. Abstract "Nanotransfer printing techniques have attracted significant attention due to their outstanding simplicity, cost-effectiveness, and high throughput. However, conventional methods via a chemical medium hamper the efficient fabrication with large-area... » read more

Manufacturing Bits: Jan. 10


Finding new materials with inverse design The Singapore-MIT Alliance for Research and Technology (SMART) has found a new way to perform general inverse design, a technique that can accelerate the discovery of new materials. The concept of inverse design is simple. Let’s say you want to develop products with select materials. In a computer, you input the desired materials and the propertie... » read more

Light-Emitting V-Pits: An Alternative Approach toward Luminescent Indium-Rich InGaN Quantum Dots


Abstract: "Realization of fully solid-state white light emitting devices requires high efficiency blue, green, and red emitters. However, challenges remain in boosting the low quantum efficiency of long wavelength group-III-nitride light emitters through conventional quantum well growth. Here, we demonstrate a new direct metal–organic chemical vapor deposition approach to grow In-rich InGa... » read more

Power/Performance Bits: Dec. 6


Tunable 2D semiconductors Researchers from the Singapore University of Technology and Design (SUTD), Hengyang Normal University, Nanjing University, National University of Singapore, and Zhejiang University identified a family of 2D semiconductors that could have lower resistance and enable further scaling. “Due to the quantum tunnelling effect, shrinking a silicon-based transistor too sm... » read more

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