Chip Industry Week In Review


The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

Research Bits: March 26


Skyrmion switches Researchers from the Agency for Science, Technology and Research (A*STAR) and National University of Singapore harnessed skyrmions to build a switch that has the potential to process data faster while using significantly less energy. Skyrmions are magnetic whirls that form in very thin metal layers and can be efficiently moved between magnetic regions. Using a magnetic tun... » read more

Chip Industry Technical Paper Roundup: Jan 2


New technical papers added to Semiconductor Engineering’s library this week. [table id=180 /] More ReadingTechnical Paper Library home » read more

FeFET Memory Encrypted Inside The Storage Array


A new technical paper titled "Embedding security into ferroelectric FET array via in situ memory operation" was published by researchers at Pennsylvania State University, University of Notre Dame, Fraunhofer IPMS, National University of Singapore, and North Dakota State University. Abstract "Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of... » read more

Chip Industry’s Technical Paper Roundup: October 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=150 /] Related Reading Technical Paper Library home » read more

Chip Industry Week In Review


By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

Improving ML-Based Device Modeling Using Variational Autoencoder Techniques


A technical paper titled “Improving Semiconductor Device Modeling for Electronic Design Automation by Machine Learning Techniques” was published by researchers at Commonwealth Scientific and Industrial Research Organisation (CSIRO), Peking University, National University of Singapore, and University of New South Wales. Abstract: "The semiconductors industry benefits greatly from the integ... » read more

Detecting Hardware Trojans Using Analytical Modeling


A technical paper titled “Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models” was published by researchers at National University of Singapore and Universitat Politecnica de Catalunya. Abstract: "Hardware Trojans, malicious components that attempt to prevent a chip from operating as expected, are carefully crafted to circumvent detection during the pre-deploymen... » read more

Ferroelectric Memories Answer Call For Non-Volatile Alternatives


As system designers seek to manipulate larger data sets while reducing power consumption, ferroelectric memory may be part of the solution. It offers an intermediate step between the speed of DRAM and the stability of flash memory. Changing the polarization of ferroelectric domains is extremely fast, and the polarization remains stable without power for years, if not decades. FeFETs, one of ... » read more

3D In-Memory Compute Making Progress


Indium compounds are showing great promise for 3D in-memory compute and RF integration, but more work is needed. Researchers continue to make headway into 3D device integration particularly with indium tin oxide (ITO), which is widely used in display manufacturing. Recent work indicates that different compounds of indium oxide doped with tin, gallium, or zinc combinations may boost transisto... » read more

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