3D Printing To Create Spatially Freeform, Nanomaterial-based Electronics (Rice, U. of Utah, NUS)


Researchers from Rice University, University of Utah and National University of Singapore (NUS) published "Three-dimensional printing of nanomaterials-based electronics with a metamaterial-inspired near-field electromagnetic structure." Abstract "Three-dimensional (3D) printing can create freeform architectures and electronics with unprecedented versatility. However, the full potential of... » read more

Impact Of The Film Transfer And Grain Size On The Cu-barrier Properties Of 2D WS2 Films (NUS et al.)


A new technical paper titled "Enhancing Cu-barrier properties of 2D-WS2 barriers: The role of grain size and surface passivation" was published by researchers at National University of Singapore, AIXTRON, IMiF and Applied Materials. Abstract "Two-dimensional (2D) films, such as tungsten disulfide (WS2), are being considered by the microelectronics industry as promising barrier and liner s... » read more

Chip Industry Technical Paper Roundup: Jan. 27


New technical papers recently added to Semiconductor Engineering’s library: [table id=517 /] Find more semiconductor research papers here. » read more

Chip Industry Week In Review


TSMC is expected to reduce its Fab 14 mature-node capacity by 15% to 20% to free up resources for its advanced packaging technologies, reports Counterpoint. The foundry will likely rely on its VIS affiliate site in Singapore (operational in late 2026) and other overseas fabs to ensure continued supply for older nodes. Memory The U.S. threatened 100% tariffs on South Korean memory compan... » read more

Scaling of 2D Semiconductor Nanoribbons for High Performance Transistors (Purdue, NUS et al.)


A new technical paper titled "Scaling of Two-Dimensional Semiconductor Nanoribbons for High-Performance Electronics" was published by researchers at Purdue University, National University of Singapore, Nexstrom Pte. Ltd and Dankook University. Abstract "Monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs), with their atomically thin bodies, are promising candida... » read more

Chip Industry Week in Review


Government funding/defunding NIST is terminating funding for the SMART USA Institute, a CHIPS Act research center focused on digital twins, prompting congressional concern that the decision disrupts active awards and weakens U.S. semiconductor R&D commitments. Korea Zinc was awarded $210M in CHIPS Act funding towards a new $6.6B Tennessee advanced smelter and minerals processing facility,... » read more

Chip Industry Technical Paper Roundup: Dec. 16


New technical papers recently added to Semiconductor Engineering’s library: [table id=501 /] Find more semiconductor research papers here and in the most recent Chip Industry Week in Review. » read more

HW Security: Inner Product Masking With Fault Detection Via ISE (KU Leuven, NUS, Rambus)


A new technical paper titled "Extending and Accelerating Inner Product Masking with Fault Detection via Instruction Set Extension" was published by researchers at KU Leuven, National University of Singapore, and Rambus. Abstract  "Inner product masking is a well-studied masking countermeasure against side-channel attacks. IPM-FD further extends the IPM scheme with fault detection capabil... » read more

Chip Industry Week in Review


Major Deals: Taiwan-based UMC is exploring possible collaboration with Polar Semiconductor for high-volume production of 8-inch wafers at Polar’s expanded Minnesota fab, a move that could provide domestic manufacturing capacity for automotive, data center, consumer, aerospace, and defense customers. Marvell will acquire Celestial AI for $3.25B, adding photonic fabric technology for o... » read more

Chip Industry Technical Paper Roundup: Nov. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=492 /] Find more semiconductor research papers here. » read more

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