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Shared-Write-Channel-Based Device for High-Density Spin-Orbit-Torque Magnetic Random-Access Memory


ABSTRACT "Spin-orbit-torque (SOT) devices are promising candidates for the future magnetic memory landscape, as they promise high endurance, low read disturbance, and low read error, in comparison with spin-transfer torque devices. However, SOT memories are area intensive due to the requirement for two access transistors per bit. Here, we report a multibit SOT cell that has a single write chan... » read more

Power/Performance Bits: Dec. 23


Detecting early damage in power electronics Researchers at Osaka University to detect early damage in power electronics. The team used acoustic emission analysis to monitor in real time the propagation of cracks in a silicon carbide Schottsky diode during power cycling tests. During the power cycling test, the researchers mimicked repeatedly turning the device on and off, to monitor the res... » read more

Power/Performance Bits: Aug. 4


Assessing code similarity Researchers from Intel, MIT, and Georgia Institute of Technology created an automated engine designed to learn what a piece of software intends to do by studying the structure of the code and analyzing syntactic differences of other code with similar behavior. The machine inferred code similarity (MISIM) program, a subset of Intel's work on machine programming, was... » read more

Power/Performance Bits: Nov. 19


Quantum communications chip Researchers at Nanyang Technological University, Australian National University, A∗STAR, University of Science and Technology of China, Singapore University of Technology and Design, Sun Yat-sen University, Beijing University of Posts and Telecommunications, and National University of Singapore built an integrated silicon photonic chip capable of performing quantu... » read more

Power/Performance Bits: Nov. 11


Smaller DACs and ADCs Researchers at the National University of Singapore invented a novel class of Digital-to-Analog (DAC) and Analog-to-Digital Converters (ADC) that use a fully-digital architecture. This digital architecture means design time for sensor interfaces can be reduced from months to hours with a fully-automated digital design methodology, the team said. It also has the benefit... » read more

Power/Performance Bits: July 30


100GHz transceiver Engineers at the University of California Irvine built a new wireless transceiver that works above 100 gigahertz. The 4.4-millimeter-square silicon chip, called an "end-to-end transmitter-receiver," uses a digital-analog architecture that modulates the digital bits in the analog and radio-frequency domains to process digital signals quickly and energy-efficiently. "We cal... » read more

Power/Performance Bits: Jan. 8


Ferrimagnetic memory Engineers at the National University of Singapore, Toyota Technological Institute, and Korea University propose a new type of spintronic memory that is 20 times more efficient and 10 times more stable than commercial ones. In spintronic devices, data is stored depending on up or down magnetic states. Current devices based on ferromagnets, however, suffer from a few issu... » read more

Week In Review: Manufacturing, Test


Test There is more consolidation in the ATE business. In October, Cohu completed the acquisition of Xcerra, a supplier of ATE and other products. Then, Astronics this week entered into an agreement for the sale of the intellectual-property and certain assets associated with its semiconductor test business to Advantest for $185 million in cash. The sale additionally includes a $30 million earn-... » read more

Power/Performance Bits: May 22


Sensing without battery power Engineers at the National University of Singapore developed an IoT-focused sensor chip that can continue operating when its battery runs out of energy. The chip, BATLESS, uses a power management technique that allows it to self-start and continue to function under dim light without any battery assistance. The chip can operate in two different modes: minimum-ene... » read more

Uncertainty Grows For 5nm, 3nm


As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

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