Chip Industry Technical Paper Roundup: June 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=436 /] Find more semiconductor research papers here. » read more

Electrical Properties of ML and BL MoS2 GAA NS FETs With Source/Drain Metal Contacts (NYCU)


A new technical paper titled "Electrical Characteristics of ML and BL MoS2 GAA NS FETs With Source/Drain Metal Contacts" was published by researchers at National Yang Ming Chiao Tung University. Abstract "This paper reports source/drain (S/D) contact issues in monolayer and bilayer (BL) MoS2 devices through density-functional-theory (DFT) calculation and device simulation. We begin by ana... » read more

Chip Industry Technical Paper Roundup: May 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=434 /] Find more semiconductor research papers here. » read more

Doping Mechanism Of Pure Nitric Oxide In Tungsten Diselenide Transistors (Purdue, MIT, NYCU)


A technical paper titled "Uncovering the doping mechanism of nitric oxide in high-performance P-type WSe2 transistors" was published by researchers at Purdue University, MIT and National Yang Ming Chiao Tung University (with support from Intel Corporation). "Atomically thin two-dimensional (2D) semiconductors are promising candidates for beyond-silicon electronic devices. However, an excessi... » read more

Chip Industry Technical Paper Roundup: May 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here.   » read more

Real-time Electrostatic Discharge (ESD) Monitoring Detector For Semiconductor Manufacturing


A new technical paper titled "Real-Time ESD Monitoring and Control in Semiconductor Manufacturing Environments With Silicon Chip of ESD Event Detection" was published by researchers at National Yang Ming Chiao Tung University. Abstract "Integrated circuits are susceptible to electrostatic discharge (ESD) events. Real-time detection and alerting of ESD events in semiconductor manufacturing e... » read more

Chip Industry Technical Paper Roundup: Mar. 25


New technical papers recently added to Semiconductor Engineering’s library: [table id=415 /] Find more semiconductor research papers here. » read more

Design Optimization Techniques To Improve NC-CFET Performance


A new technical paper titled "Insights Into Design Optimization of Negative Capacitance Complementary-FET (CFET)" was published by researchers at National Yang Ming Chiao Tung University. Abstract "This work assesses and analyzes negative-capacitance CFETs (NC-CFETs) with metal-ferroelectric-insulator-semiconductor (MFIS) and metal-ferroelectric-metal-insulator-semiconductor (MFMIS) configu... » read more

Chip Industry Technical Paper Roundup: Jan. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=400 /] Find all technical papers here. » read more

Impact of Extremely Low Temperatures On The 5nm SRAM Array Size and Performance


A new technical paper titled "Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures" was published by researchers at University of Stuttgart, IIT Kanpur, National Yang Ming Chiao Tung University, Khalifa University, and TU Munich. Abstract "Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temp... » read more

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