Power/Performance Bits: Dec. 26


2nm memristors Researchers at the University of Massachusetts Amherst and Brookhaven National Laboratory built memristor crossbar arrays with a 2nm feature size and a single-layer density up to 4.5 terabits per square inch. The team says the arrays were built with foundry-compatible fabrication technologies. "This work will lead to high-density memristor arrays with low power consumption fo... » read more

Making AI Run Faster


The semiconductor industry has woken up to the fact that heterogeneous computing is the way forward and that inferencing will require more than a GPU or a CPU. The numbers being bandied about by the 30 or so companies working on this problem are 100X improvements in performance. But how to get there isn't so simple. It requires four major changes, as well as some other architectural shifts. ... » read more

Betting Big On Discontinuity


Wally Rhines, president and CEO of Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about the booming chip industry, what's driving it, how long it will last and what changes are ahead in EDA and chip architectures. What follows are excerpts of that conversation. SE: The EDA and semiconductor industries are doing well right now. What's driving that growth? Rhine... » read more

Some Human Musings On Machine Learning


Throughout our semiconductor industry, there are examples of binary balance. By that, I’m not just referring to the 1s and 0s in binary code. This balance also applies to n-well and p-well device features or the deposition and etching of materials on a wafer. This duality is present in our human makeup, too. We use both hard intellect and intangible feeling in recognizing challenges, findi... » read more

Integrating Memristors For Neuromorphic Computing


Much of the current research on neuromorphic computing focuses on the use of non-volatile memory arrays as a compute-in-memory component for artificial neural networks (ANNs). By using Ohm’s Law to apply stored weights to incoming signals, and Kirchoff’s Laws to sum up the results, memristor arrays can accelerate the many multiply-accumulate steps in ANN algorithms. ANNs are being dep... » read more

More Lithography/Mask Challenges (Part 3)


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

Blog Review: May 2


Arm's Greg Yeric looks towards the future of 3D ICs with a dive into transistor-level 3D, including the different proposed methods of stacking transistors, power/performance benefits, and challenges such as parasitic resistance. Mentor's Kurt Takara, Chris Kwok, Dominic Lucido, and Joe Hupcey III explain how a custom synchronizer methodology can help avoid CDC mistakes and errors in FPGA des... » read more

Xceler Systems: Graph Architecture


An inventor who made foundational contributions to three key ways we move data through complex systems is developing a new type of neuromorphic chip to accelerate AI applications. Rather than try to build a computer that looks like a brain, Gautam Kavipurapu and Xceler Systems are building smaller bits that act like synapses. When the design is advanced enough and there are enough of them, t... » read more

How The Brain Saves Energy By Doing Less


One of the arguments for neuromorphic computing is the efficiency of the human brain relative to conventional computers. By looking at how the brain works, this argument contends, we can design systems that accomplish more with less power. However, as Mireille Conrad and others at the University of Geneva pointed out in work presented at December's IEEE Electron Device Meeting, the brain... » read more

What If We Had Bi-Directional RRAM?


The ideal memristor device for neuromorphic computing would have linear and symmetric resistance behavior. Resistance would both increase and decrease gradually, allowing a direct correlation between the number of programming pulses and the resistance value. Real world RRAM devices, however, generally do not have these characteristics. In filamentary RRAM devices, the RESET operation can raise ... » read more

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