Striking A Balance In Acoustic Inspection


Sound energy is a quick way to to spot voids, delamination, cracks, and other possible defects that are accessible from outside the chip or package, as well as some defects that are inside of chips. But acoustic inspection also is highly sensitive to different materials with different polarities, which can change the reflection of sound waves. Bill Zuckerman, product marketing manager at Nordso... » read more

From Lab To Fab: Increasing Pressure To Fuse IC Processes


Test, metrology, and inspection are essential for both the lab and the fab, but fusing them together so that data created in one is easily transferred to the other is a massive challenge. The chip industry has been striving to bridge these separate worlds for years, but the economics, speed, and complexity of change require a new approach. The never-ending push toward smaller, better-defined... » read more

Week In Review: Semiconductor Manufacturing, Test


Japanese and American trade officials announced a joint roadmap for cooperation in strengthening global semiconductor supply chains by advancing Japan-U.S. collaboration with emerging and developing countries in the Indo-Pacific. China and South Korea agreed to strengthen dialogue and cooperation on semiconductor industry supply chains with a focus on the supply of key raw materials and ensu... » read more

Week In Review: Semiconductor Manufacturing, Test


Global semiconductor sales reached $574 billion in 2022, and U.S. semiconductor companies accounted for sales totaling $275 billion, or 48% of the global market, according to the 2023 Factbook released by the Semiconductor Industry Association (SIA). DRAM and NAND prices likely will continue to fall further this quarter because production cuts have not kept pace with weakening demand, accord... » read more

Bump Reliability is Challenged By Latent Defects


Thermal stress is a well-known problem in advanced packaging, along with the challenges of mechanical stress. Both are exacerbated by heterogenous integration, which often requires mingling materials with incompatible coefficients of thermal expansion (CTE). Effects are already showing up and will likely only get worse as package densities increase beyond 1,000 bumps per chip. “You comb... » read more

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