Blog Review: July 7


Cadence's Sangeeta Soni provides a primer on the PIPE SerDes architecture and some of the changes that can introduce verification challenges for SerDes compliant PHY and MAC devices. Siemens EDA's Chris Spear demystifies the $cast() method in SystemVerilog, which checks values at runtime rather than compile time, and gives some examples of when it is useful. Synopsys' Chris Clark warns th... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs More delays and product woes at Intel. “INTC disclosed that it is delaying the launch of its next-generation Xeon server processor Sapphire Rapids (10nm) from the end of this year to 1Q22 due to additional validation needed for the chip,” said John Vinh, an analyst at KeyBanc, in a research note. “Production is expected to begin in 1Q22, with the ramp expected to begi... » read more

Week In Review: Design, Low Power


Tools Imperas and Valtrix inked a multi-year distribution and support agreement that makes Imperas simulation technology and RISC-V reference models available pre-integrated within Valtrix STING for RISC-V processor verification. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (st... » read more

Architectural Considerations For AI


Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

Week In Review: Manufacturing, Test


Fab tools TEL plans to ship its leading-edge coater/developer system to the joint Imec-ASML research lab, which is working on high-NA extreme ultraviolet (EUV) lithography. The equipment will be integrated with the EXE:5000, ASML’s next-generation high-NA EUV lithography system. The 0.55 numerical aperture (NA) tool is slated to be operational in 2023. Today's EUV is in production, but there... » read more

Week In Review: Design, Low Power


Rambus is making a push for Compute Express Link (CXL) with two acquisitions and the launch of its CXL Memory Interconnect Initiative. The initiative aims to define and develop semiconductor solutions for advanced data center architectures, with initial research and development focusing on solutions to support key memory expansion and pooling use cases. CXL is an open interconnect specificat... » read more

Blog Review: Jun 9


Arm's Partha Maji introduces a collaboration with the University of Cambridge to advance Bayesian statistics and probabilistic machine learning, which could play a vital role in safety-critical AI applications. Siemens' Thomas Dewey looks at a way to improve autonomous driving capabilities by enabling vehicles to train on past hazardous situations to provide and early warning for when they m... » read more

Blog Review: June 2


Synopsys' Mike Borza checks out how automotive ECUs, infotainment systems, and in-vehicle networks can be compromised by attackers and why it’s important to follow cybersecurity best practices and keep security in mind starting early in the design cycle. Cadence's Paul McLellan checks out the results from the latest MLPerf benchmarks for machine learning inference systems, with the new inc... » read more

Blog Review: May 26


Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Week In Review: Manufacturing, Test


Government policy Semiconductor companies as well hardware and software vendors have announced the formation of the Semiconductors in America Coalition (SIAC). The group called on congressional leaders to appropriate $50 billion for U.S. manufacturing incentives and research initiatives. SIAC’s mission is to advance federal policies that promote semiconductor manufacturing and research in th... » read more

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