tag: Nvidia

The Week In Review: Manufacturing
By Mark LaPedus - 20 Mar, 2015 - Comments: 0

For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above work for Altera. Now, Altera will soon select a foundry partner for 10nm. “Altera will make a decision on which foundry partner it will choose for 10nm finFET at the end of 1Q15, noting it will decide between Intel and TSMC,” said John Vin... » read more

Unraveling The Mysteries At IEDM
By Mark LaPedus - 19 Dec, 2014 - Comments: 0

In some respects, the 2014 IEEE International Electron Devices Meeting (IEDM) was no different than past events. The event, held this week in San Francisco, included the usual and dizzying array of tutorials, sessions, papers and panels. On the leading-edge CMOS front, for example, the topics included [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D IC"] chips, III-V materials, [getkc ... » read more

Is The Stacked Die Ecosystem Stagnating?
By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

New Machine Tops The Green500 List
By Barry Pangrle - 10 Dec, 2014 - Comments: 0

The Green500 has released its latest list of the top 500 most energy efficient Supercomputers and there is a new machine, L-CSC from the Helmholtz Center that is the first supercomputer to surpass the 5 GigaFLOPS/watt barrier. The machine is yet another heterogeneous system and is based on AMD FirePro S9150 GPU accelerators and Intel Xeon E5-2690v2 10C 3GHz processors. IBM and NVIDIA aren’... » read more

Blog Review: Nov. 12
By Ed Sperling - 12 Nov, 2014 - Comments: 0

ARM's Eoin McCann provides a primer to software-defined networking, which uses a higher level of abstraction to create a centralized controller. This is a new twist on networking—with a bit of deja vu thrown in. Mentor's Matthew Ballance points to a perfect storm for verification—shrinking features, more layers and more embedded processors. He has some tips for how to deal with all of t... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 07 Nov, 2014 - Comments: 0

China’s Jiangsu Changjiang Electronics Technology (JCET) has made a bid to acquire STATS ChipPAC for $780 million, according to reports. This year’s top-20 chip ranking includes two pure-play foundries--TSMC and UMC--and six fabless companies, according to IC Insights. GlobalFoundries is forecast to be replaced in this year’s top 20 ranking by fabless IC supplier Nvidia, according to t... » read more

A Decade At The Ceiling
By Barry Pangrle - 05 Nov, 2014 - Comments: 0

This month marks the tenth anniversary of the introduction of the Intel Pentium 4 HT 570J, which had an advertised operating frequency of 3.8 GHz. It was manufactured in a 90nm process, had a VID voltage range of 1.2V-1.425V and was rated at 115W TDP. In a previous article, Power to Fly, we looked at the graph that I’m including again here below for reference. The microprocessor indu... » read more

A Formally Free Lunch
By Brian Bailey - 05 Nov, 2014 - Comments: 0

I am sure many of you can remember the successful events staged by [getperson id="11679" p_name="Eric Hennenhofer"], founder and CEO of [getentity id="22813" comment="Obsidian Software"]. While neither his name nor that of his company may be on the tip of your tongue, DVClub might ring a few more bells. He started it so that he could have a place to meet fellow engineers while enjoying a free l... » read more

The Week In Review: Design
By Ed Sperling - 24 Oct, 2014 - Comments: 0

IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

The Week In Review: Design
By Ed Sperling - 08 Aug, 2014 - Comments: 0

Tools Cadence rolled out a custom power integrity tool for dealing with transistor-level electromigration and IR drop with SPICE-level accuracy. It works in conjunction with the company’s existing power integrity tool for cell-level power signoff. Open-Silicon established a high-speed SerDes technology center of excellence to speed design and production of ASICs using high-speed serial co... » read more

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