tag: Nvidia

The Power Of Logic
By Barry Pangrle - 11 Apr, 2013 - Comments: 1

By Barry Pangrle CMOS logic has been dominant since nMOS gave way back in the 1980s. Dynamic logic, like domino, has seen its application in high-speed and often hand-crafted datapath circuits. The potential energy efficiency of operating at near-threshold voltage is very enticing but having to deal with variability issues has made engineers reluctant to try to do more at lower voltages. The q... » read more

Experts At The Table: FinFET Questions And Issues
By Ed Sperling - 11 Apr, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the current state and future promise of finFETs, and the myriad challenges, with Ruggero Castagnetti, an LSI fellow; Barry Pangrle, senior power methodology engineer at Nvidia; Steve Carlson, group director of marketing at Cadence; and Mary Ann White, director of product marketing at Synopsys. What follows are excerpts ... » read more

EDA Power Moves
By Barry Pangrle - 14 Mar, 2013 - Comments: 0

By Barry Pangrle There have been some recent moves at the top of a couple of smaller but notable EDA companies. At Calypto, Doug Aitelli, who was named the CEO in January 2011 (he succeeded Tom Sandoval who then joined the Board of Directors) was replaced by industry veteran Sanjiv Kaul, the company announced last month. When Doug took over the reins at Calypto, the company described itself... » read more

28nm Powers TSMC Forward
By Barry Pangrle - 14 Feb, 2013 - Comments: 1

By Barry Pangrle TSMC’s financial results for Q4 of 2012 and for the full year were announced just a few weeks agom with TSMC stating it had achieved record sales and profits. Basically, TSMC currently owns the 28nm foundry market. Chairman Morris Chang was clear to distinguish 28nm from 32nm. TSMC substantially moved to the 40nm “half-node” from 45nm, and then skipped 32nm and went to 2... » read more

Experts At The Table: Latency
By Ed Sperling - 01 Feb, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

The CES Effect
By Frank Ferro - 31 Jan, 2013 - Comments: 0

By Frank Ferro CES draws a lot of attention. Everyone wants to be first to see the latest and greatest consumer products. If you don’t mind squeezing through the crowd, you can glimpse the startling picture quality of an OLED TV. Never mind viewing the quality of a 4K Ultra HDTV, at CES you can skip a generation and see what an 85” 8K UHDTV looks like. Talk about resolution! You also can e... » read more

Experts At The Table: Latency
By Ed Sperling - 25 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Shaking Up The Green500
By Barry Pangrle - 17 Jan, 2013 - Comments: 0

Barry Pangrle Last September, I wrote about the efficiency of IBM’s Power7+ architecture in my blog. IBM’s Sequoia supercomputer (a BlueGene/Q system) this past June had just shot to the top of the Supercomputing Top500 chart, clocking in at 16.32 petaflop/s on the Linpack benchmark. Other systems built around the IBM BlueGene/Q, Power BQC 16C 1.60GHz, Custom were also dominating the top o... » read more

Experts At The Table: Latency
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

Welcome To The ‘Probably Good Die’ Era
By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus In today’s systems, consumers want more performance and bandwidth with a longer battery life. Some chip segments are keeping up with the demands. Still other areas are falling way behind the curve. Battery life is an obvious problem, but memory bandwidth is under the radar. “Initially, memory bandwidth nearly doubled every two years, but this trend has slowed over the pa... » read more

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