tag: NXP

New Reliability Issues Emerge
By Ed Sperling - 27 Jun, 2013 - Comments: 0

By Ed Sperling Most consumers define reliability by whether a device turns on and works as planned, but the term is becoming harder to define as complexity increases and systems are interconnected. Adding more functionality in less space has made it more difficult to build complex chips, and it has made it more difficult to prevent problems in those chips. Verification coverage is a persist... » read more

Power And Performance: GSS Sees SOI Advantages For FinFETs
By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere.  But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

Being Different Is Bad
By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more

EMI Cuts A Wide Swath
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler Electromagnetic interference (EMI) cuts across all application segments, whether it’s aerospace and defense and its various tangents, or in a handset, virtually touching a large majority of engineering teams today. The reason this issue affects so many engineering groups is because as modulation schemes become ever more complex they become even more sensitive to ... » read more

More EMI Mitigation
By Ann Mutschler - 03 Nov, 2011 - Comments: 0

With electromagnetic interference a major design challenge today in any product that sends or receives a signal, determining how to lessen the impact of this phenomenon was addressed to a large extent in my article, “EMI Cuts a Wide Swath,” but there are a few additional techniques that are important to highlight. Erick Olsen, marketing director at NXP explained that higher performance c... » read more

Does SOI matter to the designers using the chips?
By Various Writers - 19 Aug, 2011 - Comments: 0

By Adele Hars Much of the SOI vs. bulk discussion zeros right in on the manufacturing bottom line:  which is cheaper?   And absolutely, customers want the most cost-effective solution.  But the best of all possible worlds is if you can save them money and give them all the bells and whistles they're looking for, too, right? [caption id="attachment_150" align="alignleft" width="150" capti... » read more

Bridging IP With Verification Standards
By Ann Mutschler - 21 Oct, 2010 - Comments: 0

By Ann Steffora Mutschler Standards body Accellera is sounding the gong to summon all verification IP providers to check out its efforts in connection with IP-XACT -- IEEE 1685, "Standard for IP-XACT, Standard Structure for Packaging, Integrating and Re-Using IP Within Tool-Flows” – with verification IP. The IP-XACT technical committee has been busy over the past year. Formerly an effor... » read more

Energy Star Meets Data Security
By Ed Sperling - 11 Mar, 2010 - Comments: 0

By Pallab Chatterjee Security technology and low power typically don’t go together in the same sentence, let alone the same device. All of that is starting to change, though. With 2% of the world’s energy being consumed by data centers, the new Energy Star guidelines and their associated tax incentives have been driving IT updates and upgrades since 2009 . The security industry is n... » read more

End-User Report: Interoperability Still Lacking With System-Level Power Modeling
By Ann Mutschler - 27 Aug, 2009 - Comments: 0

All of the major EDA vendors and standards groups are pitching modeling as the next level of abstraction for advanced process nodes, but is it working as planned for the chipmakers? System-Level Design caught up with Frans Theeuwen, Department Manager for System Design at NXP Semiconductors Corp. to discuss system-level design and power modeling. By Ann Steffora Mutschler SLD: How long has N... » read more

When It Comes To Intellectual Property, Size Matters
By Various Writers - 19 Aug, 2009 - Comments: 0

By Geoffrey James Intellectual property was once seen as the new growth market for EDA. Dozens of firms – large and small – jumped on the IP bandwagon, attracted to the “build once, sell many times” business model. “As late as 2004, the industry was still thinking that as much as 90% of SoCs would be reused IP,” said EDA consultant Gary Smith. The IP segment, however, hasn�... » read more

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