Using Formal Verification To Prevent Catastrophic Security Breaches

By Dave Kelf - 29 Sep, 2016 - Comments: 0

The news of last week’s Yahoo hack that affected 500-million or so users sent shock waves of anxiety far and wide. It’s not clear yet how the massive data breach occurred or through what means the hackers accessed the network. It could be the chips that drive the network, often vulnerable to attacks on their operational integrity. It’s no surprise, then, that semiconductor companies ar... » read more

Rethinking Verification For Cars

By Ann Mutschler - 29 Sep, 2016 - Comments: 0

As the amount of electronic content in a car increases, so does the number of questions about how to improve reliability of those systems. Unlike an [getkc id="76" kc_name="IoT"] device, which is expected last a couple of years, automotive electronics fall into a class of safety-critical devices. There are standards for verifying these devices, new test methodologies, and there is far mo... » read more

Gaps In The Verification Flow

By Brian Bailey - 29 Sep, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at [getentity id="22017" e_name="Mentor Graphics"]; [getperson id="11079" comment="Anupam Bakshi"], CEO of [getentity id="22168" e_name="Agnisys"]; [getperson id="11124" comment="Mike Bartley"], CEO of [getentity id="22868" e_name="Test and Verification... » read more

Auto Security And Technology Questions Persist

By Ann Mutschler - 01 Sep, 2016 - Comments: 1

While carmakers continue to add increasingly sophisticated driver assist features to new models, semiconductor industry ecosystem players are ramping up their foundation knowledge of what is needed from a technology and security perspective. Fortunately, it appears many existing semiconductor design tools will fit the bill as part of new approaches for automotive design. Mike Stellfox... » read more

What’s Missing From Machine Learning

By Ed Sperling - 01 Sep, 2016 - Comments: 1

Machine learning is everywhere. It's being used to optimize complex chips, balance power and performance inside of data centers, program robots, and to keep expensive electronics updated and operating. What's less obvious, though, is there are no commercially available tools to validate, verify and debug these systems once machines evolve beyond the final specification. The expectation is th... » read more

The Higher Cost Of Automotive

By Ann Mutschler - 04 Aug, 2016 - Comments: 0

A revolution is occurring under the hoods of vehicles today, as the automotive industry continues to add sophistication via electronics to vehicles at a pace never seen before. But because of the automotive ecosystem’s tiered structure, system companies, IP and embedded software developers and tools vendors must invest more just to participate. Robert Bates, chief safety officer in [getent... » read more

What’s Next For UVM?

By Brian Bailey - 28 Jul, 2016 - Comments: 0

The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to deal with heterogeneous integration, more customization, and increased complexity. Verification methodologies started appearing soon after the release of SystemVerilog. Initially they were inten... » read more

Formal Analysis Of X Propagation

By OneSpin Solutions - 27 Jul, 2016 - Comments: 0

Verifying the absence of undefined signal values in a design is in general a hard problem. Formal 4-state logic analysis offers a powerful solution. This white paper discusses X-related verification issues, and how advanced 4-state formal analysis solves them. This white paper covers the 360 DV-Verify product. To read more, click here. » read more

Executive Insight: Raik Brinkmann

By Ed Sperling - 06 Jul, 2016 - Comments: 0

[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other verification approaches. What follows are excerpts of that conversation. SE: [getkc id="33" kc_name="Formal"] has been around for a whi... » read more

The Secret To Good Comedy And SystemC Code Verification… Timing!

By Dave Kelf - 30 Jun, 2016 - Comments: 0

The High-Level Synthesis (HLS) of algorithmic code, usually written in SystemC, is steadily gaining ground. However, the verification of this code is still a somewhat mixed-up, ad-hoc process. The situation is improving as new techniques are applied, but it is clear that in-the-trenches evaluation of these solutions on real projects is more important right now than grand visions missing substan... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

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by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

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New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.