The Pain Of Change


If the still evolving shift left has taught the semiconductor industry anything, it's that nothing can be counted on to stay the same for very long. The basic proposition of doing more earlier in the design cycle to speed up time to market—and thereby shifting everything left in the linear flow—means that every silo that has been constructed over the past several decades needs to be rethoug... » read more

Why Packaging Matters


The semiconductor package is changing. What was until very recently considered an afterthought is now becoming a key part of the design process at all major chipmakers, and a critical factor in the extension of Moore's Law. This is a sharp reversal of what was almost universally an afterthought in planar silicon design and manufacturing. Rarely was the package an integral part of the archite... » read more

Packaging Wars Ahead


There has been much talk about semiconductor industry consolidation, but the shift into advanced packaging could have more far-reaching effects than all the mega-deals so far. Packaging is big business. Yole Développement has pinned the market at $30 billion, but that's only a thin slice of the pie that's in play. Companies that win the packaging deals also have a good shot of winning the m... » read more

Tech Talk: 14nm And Stacked Die


Aashish Malhotra, marketing director for the ASIC Business Unit at GlobalFoundries, talks about 14nm process technology, the IP ecosystem, and why that technology node will be used as a platform for 2.5D and 3D stacked die across a wide range of markets including the Internet of Everything. [youtube vid=ukTRuedB7ZU] » read more

Security In 2.5D


The long-anticipated move to 2.5D and fan-outs is raising some familiar questions about security. Will multiple chips combined in an advanced package be as secure as SoCs where everything is integrated on the same die? The answer isn't a simple yes or no. Put in perspective, all chips are vulnerable to [getkc id="253" kc_name="side channel attacks"], hacking of memory—a risk that increases... » read more

Tech Talk: Configurable Logic


Cliff Lloyd, business development director at NXP Semiconductors, talks about designing in one part for many functions to reduce power consumption and cost. [youtube vid=ut5kCm0kNwE] » read more

Executive Insight: Lip-Bu Tan


Lip-Bu Tan, president and CEO of Cadence, sat down with Semiconductor Engineering to talk about consolidation, Moore's Law, and where the opportunities are in the IoT and automotive markets. What follows are excerpts of that conversation. SE: What are the big concerns for the semiconductor industry in general, and EDA in particular? Tan: Top on my list is all the consolidation that's goin... » read more

EDA, IP Numbers Up


EDA and IP numbers increased another 8.5% in Q2, with all regions but Japan showing positive growth. Total revenue was $1.91 billion for the quarter, up from $1.76 billion in Q2 of 2014. The largest category, computer-aided engineering, was $657.2 million for the quarter, up 9.6% compared with the same period last year. IC physical design was $379.2 million, up 6% year over year, and IP was ... » read more

Is The 2.5D Supply Chain Ready?


A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

SEMICON Taiwan’s Packaging Punch


SEMICON Taiwan packed a punch, setting several new records and new heights in 2015. This year marked the 20th anniversary of SEMICON in Taiwan and was the largest SEMICON in Taiwan ever, with a Nobel Prize winner (Professor Shuji Nakamura, 2014’s winner) keynoting the Executive Summit, Taiwan’s President Ma speaking at the hugely attended Gala Dinner, and 2015 on track for TSMC to be the wo... » read more

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