Chip Industry Technical Paper Roundup: Feb. 19


New technical papers added to Semiconductor Engineering’s library this week. [table id=199 /] More ReadingTechnical Paper Library home » read more

SW/HW Codesign For CXL Memory Disaggregation In Billion-Scale Nearest Neighbor Search (KAIST)


A technical paper titled “Bridging Software-Hardware for CXL Memory Disaggregation in Billion-Scale Nearest Neighbor Search” was published by researchers at the Korea Advanced Institute of Science and Technology (KAIST) and Panmnesia. Abstract: "We propose CXL-ANNS, a software-hardware collaborative approach to enable scalable approximate nearest neighbor search (ANNS) services. To this e... » read more

Startup Funding: September 2023


Chip-to-chip and data center I/O drew investor interest in September, including support for several startups developing Compute Express Link (CXL) solutions. Elsewhere in the data center, several large rounds went to companies developing AI accelerators. And at the edge, startups are building unique ways to handle AI at very little power by initially processing data directly at the sensor. O... » read more

Chip Industry’s Technical Paper Roundup: Jan. 31


New technical papers added to Semiconductor Engineering’s library. [table id=77 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting l... » read more