tag: Pohang University of Science and Technology

Bias- and Temperature-Dependent Noise Measurements to Investigate Carrier Transport at the Tellurium Interface (POSTECH)
By Technical Paper Link - 20 Mar, 2026 - Comments: 0

A new technical paper, "Revealing and Engineering Contact-Origin Noise in Ultrathin Tellurium Transistors," was published by researchers at Pohang University of Science and Technology. Abstract "Tellurium (Te) has emerged as a promising p-type semiconductor for ultrathin electronics owing to its strong air stability, excellent hole transport, narrow bandgap, and BEOL-integration compatibi... » read more

Research Bits: Feb. 17
By Jesse Allen - 17 Feb, 2026 - Comments: 0

Analog layout foundation model Researchers from Pohang University of Science and Technology (POSTECH) built a foundation model for automated analog circuit layout. The team used a self-supervised learning approach, in which the model learns without human-provided labels. To counter a lack of available training data, the team divided analog layouts into small patches, masked part of each lay... » read more

Research Bits: Jan. 20
By Jesse Allen - 20 Jan, 2026 - Comments: 0

ALD for Ru wiring Researchers from Ulsan National Institute of Science and Technology (UNIST), Hongik University, and Tanaka Precious Metal Technologies developed an atomic layer deposition (ALD) process for creating chip interconnects using a ruthenium (Ru) precursor with a thermal stability up to 400 °C. The high-temperature ALD process can produce dense, high-quality Ru films without deg... » read more

Research Bits: Nov. 10
By Jesse Allen - 10 Nov, 2025 - Comments: 0

Post-doping plasma for DRAM capacitors Researchers from Ulsan National Institute of Science and Technology (UNIST), Pohang University of Science and Technology (POSTECH), and Seoul National University of Science and Technology developed a post-doping plasma (PDP) process to improve the performance of DRAM capacitors. Aluminum-doped titanium dioxide (Al-doped TiO2) is a promising material fo... » read more

Research Bits: Oct. 13
By Jesse Allen - 13 Oct, 2025 - Comments: 0

Mimicking neural plasticity Researchers from Korea Advanced Institute of Science and Technology (KAIST) developed a frequency switching neuristor device that mimics the intrinsic plasticity of neurons. The device can autonomously adjust the frequency of its signals, similar to the way the brain becomes less startled by repeated stimuli or becomes increasingly sensitive through training. The... » read more

Research Bits: Apr. 15
By Jesse Allen - 15 Apr, 2025 - Comments: 0

Shape-morphing OLED panel with built-in speaker Researchers from Pohang University of Science and Technology (POSTECH) developed a flexible OLED panel that can freely transform its shape while simultaneously functioning as a speaker. The design is based on a based on a specialized ultra-thin piezoelectric polymer actuator that when integrated into a flexible OLED panel enables electrically ... » read more

Research Bits: Apr. 7
By Jesse Allen - 07 Apr, 2025 - Comments: 0

DNA scaffolds for 3D electronics Researchers from Columbia University, Brookhaven National Laboratory, and University of Minnesota used DNA to help create self-assembled 3D electronic devices with nanometer-size features. The team deposited arrays of gold squares on a surface, onto which they could attach short pieces of DNA. These served as anchors to which they could fasten eight-sided di... » read more

Research Bits: Sept. 17
By Jesse Allen - 17 Sep, 2024 - Comments: 0

DNA data storage plus compute Researchers from North Carolina State University and Johns Hopkins University created a DNA-based device that can perform both data storage and computing functions. “Specifically, we have created polymer structures that we call dendricolloids – they start at the microscale, but branch off from each other in a hierarchical way to create a network of nanoscal... » read more

3D IC Partitioning and Placement Method That Optimizes For Critical Paths (POSTECH)
By Technical Paper Link - 12 Sep, 2024 - Comments: 0

A new technical paper titled "TA3D: Timing-Aware 3D IC Partitioning and Placement by Optimizing the Critical Path" was published by researchers at Pohang University of Science and Technology and Baum Design Systems. Abstract "In the face of challenges posed by semiconductor scaling, 3D integration technology has emerged as a crucial solution to overcome the constraints of traditional 2D I... » read more

Chip Industry Technical Paper Roundup: August 20
By Linda Christensen - 20 Aug, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=252 /] More ReadingTechnical Paper Library home » read more

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