Lower Your Power Consumption For Battery-Operated Smart Devices

By Infineon - 04 Dec, 2024 - Comments: 0

Striking the right balance between battery life and customer experience The number of connected smart home battery-operated devices is expected to grow as consumers look for new ways to retrofit their homes with IoT devices without power cabling. This change leaves device makers in search of new ways to make their battery-operated smart home products more power-efficient at all levels, while st... » read more

Where Power Savings Really Count

By Ed Sperling - 31 Jul, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss why and where improvements in architectures and data movement will have the biggest impact, with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice presi... » read more

IC Power Optimization Required, But More Difficult To Achieve

By Adam Kovac - 18 Jul, 2024 - Comments: 0

Power optimization is playing an increasingly vital role in chip and chip and system designs, but it's also becoming much harder to achieve as transistor density and system complexity continue to grow. This is especially evident with advanced packages, chiplets, and high-performance chips, all of which are becoming more common in complex designs. Inside data centers, racks of servers are str... » read more

Making Sensors More Reliable

By Karen Heyman - 05 Oct, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the latest issues in sensors with Prakash Madhvapathy, director of product marketing, Tensilica audio/voice DSPs group at Cadence; Kevin Hughes, senior product manager for MEMS sensors at Infineon; and Matthew Hogan, product management director at Siemens EDA. What follows are excerpts of that conversation. [L-R] Kevin ... » read more

Supercomputing Efficiency Lags Performance Gains

By Barry Pangrle - 30 Jun, 2023 - Comments: 0

In last month’s article, Top 500: Frontier is Still on Top, I wrote about the latest versions of the Top500 and Green500 lists. Power is an incredibly important aspect of designing a world performance leading supercomputer. (Why, I can remember back to when you could run the world’s fastest machine on only a couple MW of power.) The first Green500 list was published back in 2013. Happy 1... » read more

Smart Devices Enabled To Efficiently Communicate, Sense, Hear, Act And Interact With User

By Renesas - 22 Feb, 2023 - Comments: 0

The latest advancements in embedded systems and communication and sensing technology have led to the increasing development of smart applications. This has been a continuously evolving process, involving either the creation of completely new solutions or the rapid transformation of existing ones into corresponding highly smart environments. The main driving forces of the smart transformation ha... » read more

Algorithm HW Framework That Minimizes Accuracy Degradation, Data Movement, And Energy Consumption Of DNN Accelerators (Georgia Tech)

By Technical Paper Link - 31 Aug, 2022 - Comments: 0

This new research paper titled "An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators" was published by researchers at Georgia Tech. According to the paper's abstract, "In recent years, processing in memory (PIM) based mixed-signal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN com... » read more

AI Power Consumption Exploding

By Brian Bailey - 15 Aug, 2022 - Comments: 2

Machine learning is on track to consume all the energy being supplied, a model that is costly, inefficient, and unsustainable. To a large extent, this is because the field is new, exciting, and rapidly growing. It is being designed to break new ground in terms of accuracy or capability. Today, that means bigger models and larger training sets, which require exponential increases in processin... » read more

A Minimal RISC-V

By Brian Bailey - 13 Jan, 2022 - Comments: 8

Microcontrollers exist in almost everything, but can RISC-V satisfy the needs of this market? Is it small enough to replace 8-bit processors? What might help people migrate to a more modern processor architecture? RISC-V defines a 32-bit processor instruction set architecture (ISA) that is open source and free to be implemented in any number of ways. It is touted for being a very small and e... » read more

Improving Energy And Power Efficiency In The Data Center

By Ann Mutschler - 06 Dec, 2021 - Comments: 0

Energy costs in data centers are soaring as the amount of data being generated explodes, and it's being made worse by an imbalance between increasingly dense processing elements that are producing more heat and uneven server utilization, which requires more machines to be powered up and cooled. The challenge is to maximize utilization without sacrificing performance, and in the past that has... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: power efficiency