Too Hot To Handle


By Ann Steffora Mutschler It used to be that a device could be designed to a thermal design power. The worst case power scenario would be imagined, and the device would be designed with that in mind. But those good old days are gone. Especially for consumer devices, how a device is going to behave with respect to time, or how people are going to use it, must be understood as completely a... » read more

Embedded Power Management Challenges Grow


By Ann Steffora Mutschler Power management always has been, and will continue to be, a big issue with electronic devices. But when it comes to power management in embedded systems—controlling battery power in a smartphone, an industrial automation or automotive application, among a myriad of other options—the approaches come with different variables. For example, deeply embedded s... » read more

All Things To All Customers


By Ann Steffora Mutschler Low-Power High-Performance Engineering recently spoke with Suresh Menon, VP of systems development at Lattice Semiconductor, about the challenges of directing the development of power-sensitive FPGAs from architectural decisions to identifying the target applications. What follows are excerpts of that discussion. LPHP: When you look at the products that Lattic... » read more

28, 20nm Nodes Demand Advanced Power Management


By Ann Steffora Mutschler With the complexity of getting 28 and 20nm designs to reach desired yields with the desired power and performance on the shoulders of design teams, advanced power management techniques are a must. Sub-clock power gating, clock power gate structures, adaptive body bias and other techniques are making it possible. Sub-Clock Power Gating Far from a new techniqu... » read more

Reducing Circuitry To Reduce Power


By Ann Steffora Mutschler Power is at the top of the list of concerns for design teams today. Consequently, engineers are constantly looking at new techniques and architectural approaches to lower and management the power and energy consumption of their devices. This has resulted in some incredible engineering feats, turning parts of a device on and off as needed, applying different volta... » read more

Training The Next Gen For Low Power


Reflecting on my time at this year's Design Automation Conference, I am quickly reminded that I work in the most fascinating industry I can think of. Having the opportunity to discuss deep technical low power design issues, forward-looking challenges as well as the business implications face to face with thought leaders is inspiring and invigorating. With the amount of brain power filling Mosco... » read more

System Models Are Changing


By Pallab Chatterjee Historically system-level modeling was based on making sure there were no timing crashes on the main data bus. After that it was multi-core conflict resolution, distributed memory routing and, most recently, verifying the correct core actually has access to the correct memory with the data that is relevant being available. All of these areas are now subject to an additi... » read more

Low-Power Solutions At DAC


By Bhanu Kapoor Power is the main driver of semiconductor process technology related advances recently. One would expect a similar focus in the electronic design automation industry to help designers implement low power designs. However, the latest DAC in San Diego didn’t give the impression that the EDA industry is thinking likewise, perhaps with the exception of verification aspects of low... » read more

Power Management Trumps Battery Technology


By Ann Steffora Mutschler The lithium-ion battery has the power to ruin someone’s day, especially when it dies and cannot be charged, not to mention occasional thermal runaways that literally cause explosions. For a technology that is about 30 years old, and approaching its limits, it is mind-boggling that the best brains on the planet haven’t come up with a technological superior alternat... » read more

Why So Formal?


By Bhanu Kapoor Let’s take a look at the types of power management verification issues that are most suited for formal verification and how formal techniques complement dynamic simulation-based verification in some of the challenging tasks associated with validating SoC power management architectures. There are three main categories of formal tools in use today: Equivalence Checkers, Asse... » read more

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