tag: PPA

Optimizing For Energy In Physical Design
By Pierre-Alexandre Bou-Ach - 10 Sep, 2020 - Comments: 0

Energy is a precious resource, which should not be wasted. Energy drives economies and sustains societies. Predictions show that the energy of electronics may soon consume 20% to 33% of the global energy supply, as it is highlighted in this blog post about "Design and Manufacturing in 2030" from Greg Yeric, fellow at Arm. Energy efficiency is such an important global issue that it is ... » read more

How ML Enables Cadence Digital Tools To Deliver Better PPA
By Cadence - 09 Sep, 2020 - Comments: 0

Artificial intelligence (AI) and machine learning (ML) are emerging as powerful new ways to do old things more efficiently, which is the benchmark that any new and potentially disruptive technology must meet. In chip design, results are measured in many different ways, but common metrics are power (consumed), performance (provided), and area (required), collectively referred to as PPA. These me... » read more

Understanding The Performance Of Processor IP Cores
By Roddy Urquhart - 27 Aug, 2020 - Comments: 1

Looking at any processor IP, you will find that their vendors emphasize PPA (performance, power & area) numbers. In theory, they should provide a level playing field for comparing different processor IP cores, but in reality, the situation is more complex. Let us consider performance. The first thing to think about is what aspect of performance you care about. Do you care more about the ... » read more

EDA Forms The Basis For Designing Secure Systems
By Adam Cron - 03 Aug, 2020 - Comments: 0

By Adam Cron and Brandon Wang As Internet of Things (IoT) devices rapidly increase in popularity and deployment, security risks are arising at all levels. It could be at the usability level such as social engineering, pretexting, phishing; at the primitive level such as cryptanalysis; at the software level such as client-side scripting, code injection; and now even at the hardware level. Dur... » read more

Maximizing Value Post-Moore’s Law
By Brian Bailey - 13 Jul, 2020 - Comments: 0

When Moore's Law was in full swing, almost every market segment considered moving to the next available node as a primary way to maximize value. But today, each major market segment is looking at different strategies that are more closely aligned with its individual needs. This diversity will end up causing both pain and opportunities in the supply chain. Chip developers must do more with a ... » read more

The Fast, ‘Attractive’ Path From Great PPA To The Best PPA For High-Performance Arm Cores
By Neel Desai - 25 Jun, 2020 - Comments: 0

By Mark Richards and Neel Desai When you want to create a website for your new side-hustle, or maybe for your local soccer team, it's rare that you would order a book on cascading-style sheets, break out the HTML editor and start from a blank sheet of “paper.” You'd do the smart thing and use a website builder, link it to some content management tool (this would get you to 90% of a usabl... » read more

Best Full-Flow PPA
By Cadence - 10 Jun, 2020 - Comments: 0

In the past few years, Cadence revolutionized the way digital designers could solve their design challenges by revamping the entire digital tool suite with key enhancements such as integrated engines, massively parallel processing, and early signoff optimization, all delivering faster turnaround time and best-in-class power, performance, and area (PPA) optimization. In the era of FinFETs and ad... » read more

Why It’s So Hard To Create New Processors
By Brian Bailey - 26 Mar, 2020 - Comments: 1

The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

Automotive Chip Design Workflow
By Ed Sperling - 17 Feb, 2020 - Comments: 0

Stewart Williams, senior technical marketing manager at Synopsys, talks about the consolidation of chips in a vehicle and the impact of 7/5nm on automotive SoC design, how to trade off power, performance, area and reliability, and how ISO 26262 impacts those variables. » read more

Non-Volatile Memory Tradeoffs Intensify
By Ann Mutschler - 22 Jan, 2020 - Comments: 0

Non-volatile memory is becoming more complicated at advanced nodes, where price, speed, power and utilization are feeding into some very application-specific tradeoffs about where to place that memory. NVM can be embedded into a chip, or it can be moved off chip with various types of interconnect technology. But that decision is more complicated than it might first appear. It depends on the ... » read more

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